x86/registers/
io.rs
1#[cfg(target_arch = "x86")]
10use core::arch::asm;
11
12#[cfg(target_arch = "x86")]
17#[inline]
18pub unsafe fn outb(port: u16, val: u8) {
19 unsafe {
20 asm!("outb %al, %dx", in("al") val, in("dx") port, options(att_syntax));
21 }
22}
23
24#[cfg(target_arch = "x86")]
29#[inline]
30pub unsafe fn inb(port: u16) -> u8 {
31 let ret: u8;
32 unsafe {
33 asm!("inb %dx, %al", in("dx") port, out("al") ret, options(att_syntax));
34 }
35 ret
36}
37
38#[cfg(target_arch = "x86")]
43#[inline]
44pub unsafe fn outw(port: u16, val: u16) {
45 unsafe {
46 asm!("outw %ax, %dx", in("ax") val, in("dx") port, options(att_syntax));
47 }
48}
49
50#[cfg(target_arch = "x86")]
55#[inline]
56pub unsafe fn inw(port: u16) -> u16 {
57 let ret: u16;
58 unsafe {
59 asm!("inw %dx, %ax", in("dx") port, out("ax") ret, options(att_syntax));
60 }
61 ret
62}
63
64#[cfg(target_arch = "x86")]
69#[inline]
70pub unsafe fn outl(port: u16, val: u32) {
71 unsafe {
72 asm!("outl %eax, %dx", in("eax") val, in("dx") port, options(att_syntax));
73 }
74}
75
76#[cfg(target_arch = "x86")]
81#[inline]
82pub unsafe fn inl(port: u16) -> u32 {
83 let ret: u32;
84 unsafe {
85 asm!("inl %dx, %eax", out("eax") ret, in("dx") port, options(att_syntax));
86 }
87 ret
88}
89
90#[cfg(not(any(doc, target_arch = "x86")))]
93pub unsafe fn outb(_port: u16, _val: u8) {
94 unimplemented!()
95}
96
97#[cfg(not(any(doc, target_arch = "x86")))]
98pub unsafe fn inb(_port: u16) -> u8 {
99 unimplemented!()
100}
101
102#[cfg(not(any(doc, target_arch = "x86")))]
103pub unsafe fn outw(_port: u16, _val: u16) {
104 unimplemented!()
105}
106
107#[cfg(not(any(doc, target_arch = "x86")))]
108pub unsafe fn inw(_port: u16) -> u16 {
109 unimplemented!()
110}
111
112#[cfg(not(any(doc, target_arch = "x86")))]
113pub unsafe fn outl(_port: u16, _val: u32) {
114 unimplemented!()
115}
116
117#[cfg(not(any(doc, target_arch = "x86")))]
118pub unsafe fn inl(_port: u16) -> u32 {
119 unimplemented!()
120}