cortexm7/
lib.rs

Help
1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5//! Shared implementations for ARM Cortex-M7 MCUs.
6
7#![no_std]
8
9use core::fmt::Write;
10
11pub mod mpu {
12    use kernel::utilities::StaticRef;
13
14    pub type MPU = cortexm::mpu::MPU<16, 32>; // Cortex-M7 MPU has 16 regions
15
16    const MPU_BASE_ADDRESS: StaticRef<cortexm::mpu::MpuRegisters> =
17        unsafe { StaticRef::new(0xE000ED90 as *const cortexm::mpu::MpuRegisters) };
18
19    pub unsafe fn new() -> MPU {
20        MPU::new(MPU_BASE_ADDRESS)
21    }
22}
23
24pub use cortexm::initialize_ram_jump_to_main;
25pub use cortexm::nvic;
26pub use cortexm::scb;
27pub use cortexm::support;
28pub use cortexm::systick;
29pub use cortexm::unhandled_interrupt;
30pub use cortexm::CortexMVariant;
31
32// Enum with no variants to ensure that this type is not instantiable. It is
33// only used to pass architecture-specific constants and functions via the
34// `CortexMVariant` trait.
35pub enum CortexM7 {}
36
37impl cortexm::CortexMVariant for CortexM7 {
38    const GENERIC_ISR: unsafe extern "C" fn() = cortexv7m::generic_isr_arm_v7m;
39    const SYSTICK_HANDLER: unsafe extern "C" fn() = cortexv7m::systick_handler_arm_v7m;
40    const SVC_HANDLER: unsafe extern "C" fn() = cortexv7m::svc_handler_arm_v7m;
41    const HARD_FAULT_HANDLER: unsafe extern "C" fn() = cortexv7m::hard_fault_handler_arm_v7m;
42
43    #[cfg(all(target_arch = "arm", target_os = "none"))]
44    unsafe fn switch_to_user(
45        user_stack: *const usize,
46        process_regs: &mut [usize; 8],
47    ) -> *const usize {
48        cortexv7m::switch_to_user_arm_v7m(user_stack, process_regs)
49    }
50
51    #[cfg(not(all(target_arch = "arm", target_os = "none")))]
52    unsafe fn switch_to_user(
53        _user_stack: *const usize,
54        _process_regs: &mut [usize; 8],
55    ) -> *const usize {
56        unimplemented!()
57    }
58
59    #[inline]
60    unsafe fn print_cortexm_state(writer: &mut dyn Write) {
61        cortexm::print_cortexm_state(writer)
62    }
63}
64
65pub mod syscall {
66    pub type SysCall = cortexm::syscall::SysCall<crate::CortexM7>;
67}
cortexm7/lib.rs

cortexm7/
lib.rs
