hifive1/
io.rs

Help
1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5use core::fmt::Write;
6use core::panic::PanicInfo;
7use core::ptr::addr_of;
8use core::ptr::addr_of_mut;
9use core::str;
10use kernel::debug;
11use kernel::debug::IoWrite;
12use kernel::hil::gpio;
13use kernel::hil::led;
14
15use crate::CHIP;
16use crate::PROCESSES;
17use crate::PROCESS_PRINTER;
18
19struct Writer {}
20
21static mut WRITER: Writer = Writer {};
22
23impl Write for Writer {
24    fn write_str(&mut self, s: &str) -> ::core::fmt::Result {
25        self.write(s.as_bytes());
26        Ok(())
27    }
28}
29
30impl IoWrite for Writer {
31    fn write(&mut self, buf: &[u8]) -> usize {
32        let uart = sifive::uart::Uart::new(e310_g002::uart::UART0_BASE, 16_000_000);
33        uart.transmit_sync(buf);
34        buf.len()
35    }
36}
37
38/// Panic handler.
39#[cfg(not(test))]
40#[no_mangle]
41#[panic_handler]
42pub unsafe fn panic_fmt(pi: &PanicInfo) -> ! {
43    // turn off the non panic leds, just in case
44    let led_green = sifive::gpio::GpioPin::new(
45        e310_g002::gpio::GPIO0_BASE,
46        sifive::gpio::pins::pin19,
47        sifive::gpio::pins::pin19::SET,
48        sifive::gpio::pins::pin19::CLEAR,
49    );
50    gpio::Configure::make_output(&led_green);
51    gpio::Output::set(&led_green);
52
53    let led_blue = sifive::gpio::GpioPin::new(
54        e310_g002::gpio::GPIO0_BASE,
55        sifive::gpio::pins::pin21,
56        sifive::gpio::pins::pin21::SET,
57        sifive::gpio::pins::pin21::CLEAR,
58    );
59    gpio::Configure::make_output(&led_blue);
60    gpio::Output::set(&led_blue);
61
62    let led_red_pin = sifive::gpio::GpioPin::new(
63        e310_g002::gpio::GPIO0_BASE,
64        sifive::gpio::pins::pin22,
65        sifive::gpio::pins::pin22::SET,
66        sifive::gpio::pins::pin22::CLEAR,
67    );
68    let led_red = &mut led::LedLow::new(&led_red_pin);
69    let writer = &mut *addr_of_mut!(WRITER);
70
71    debug::panic(
72        &mut [led_red],
73        writer,
74        pi,
75        &rv32i::support::nop,
76        &*addr_of!(PROCESSES),
77        &*addr_of!(CHIP),
78        &*addr_of!(PROCESS_PRINTER),
79    )
80}
hifive1/io.rs

hifive1/
io.rs
