lowrisc/registers/
usbdev_regs.rs

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
// Licensed under the Apache License, Version 2.0 or the MIT License.
// SPDX-License-Identifier: Apache-2.0 OR MIT
// Copyright lowRISC contributors 2023.

// Generated register constants for usbdev.
// Built for Earlgrey-M2.5.1-RC1-493-gedf5e35f5d
// https://github.com/lowRISC/opentitan/tree/edf5e35f5d50a5377641c90a315109a351de7635
// Tree status: clean
// Build date: 2023-10-18T10:11:37

// Original reference file: hw/ip/usbdev/data/usbdev.hjson
use kernel::utilities::registers::ReadWrite;
use kernel::utilities::registers::{register_bitfields, register_structs};
/// Number of endpoints
pub const USBDEV_PARAM_N_ENDPOINTS: u32 = 12;
/// Number of alerts
pub const USBDEV_PARAM_NUM_ALERTS: u32 = 1;
/// Register width
pub const USBDEV_PARAM_REG_WIDTH: u32 = 32;

register_structs! {
    pub UsbdevRegisters {
        /// Interrupt State Register
        (0x0000 => pub(crate) intr_state: ReadWrite<u32, INTR::Register>),
        /// Interrupt Enable Register
        (0x0004 => pub(crate) intr_enable: ReadWrite<u32, INTR::Register>),
        /// Interrupt Test Register
        (0x0008 => pub(crate) intr_test: ReadWrite<u32, INTR::Register>),
        /// Alert Test Register
        (0x000c => pub(crate) alert_test: ReadWrite<u32, ALERT_TEST::Register>),
        /// USB Control
        (0x0010 => pub(crate) usbctrl: ReadWrite<u32, USBCTRL::Register>),
        /// Enable an endpoint to respond to transactions in the downstream direction.
        (0x0014 => pub(crate) ep_out_enable: [ReadWrite<u32, EP_OUT_ENABLE::Register>; 1]),
        /// Enable an endpoint to respond to transactions in the upstream direction.
        (0x0018 => pub(crate) ep_in_enable: [ReadWrite<u32, EP_IN_ENABLE::Register>; 1]),
        /// USB Status
        (0x001c => pub(crate) usbstat: ReadWrite<u32, USBSTAT::Register>),
        /// Available Buffer FIFO
        (0x0020 => pub(crate) avbuffer: ReadWrite<u32, AVBUFFER::Register>),
        /// Received Buffer FIFO
        (0x0024 => pub(crate) rxfifo: ReadWrite<u32, RXFIFO::Register>),
        /// Receive SETUP transaction enable
        (0x0028 => pub(crate) rxenable_setup: [ReadWrite<u32, RXENABLE_SETUP::Register>; 1]),
        /// Receive OUT transaction enable
        (0x002c => pub(crate) rxenable_out: [ReadWrite<u32, RXENABLE_OUT::Register>; 1]),
        /// Set NAK after OUT transactions
        (0x0030 => pub(crate) set_nak_out: [ReadWrite<u32, SET_NAK_OUT::Register>; 1]),
        /// IN Transaction Sent
        (0x0034 => pub(crate) in_sent: [ReadWrite<u32, IN_SENT::Register>; 1]),
        /// OUT Endpoint STALL control
        (0x0038 => pub(crate) out_stall: [ReadWrite<u32, OUT_STALL::Register>; 1]),
        /// IN Endpoint STALL control
        (0x003c => pub(crate) in_stall: [ReadWrite<u32, IN_STALL::Register>; 1]),
        /// Configure IN Transaction
        (0x0040 => pub(crate) configin: [ReadWrite<u32, CONFIGIN::Register>; 12]),
        /// OUT Endpoint isochronous setting
        (0x0070 => pub(crate) out_iso: [ReadWrite<u32, OUT_ISO::Register>; 1]),
        /// IN Endpoint isochronous setting
        (0x0074 => pub(crate) in_iso: [ReadWrite<u32, IN_ISO::Register>; 1]),
        /// Clear the data toggle flag
        (0x0078 => pub(crate) data_toggle_clear: [ReadWrite<u32, DATA_TOGGLE_CLEAR::Register>; 1]),
        /// USB PHY pins sense.
        (0x007c => pub(crate) phy_pins_sense: ReadWrite<u32, PHY_PINS_SENSE::Register>),
        /// USB PHY pins drive.
        (0x0080 => pub(crate) phy_pins_drive: ReadWrite<u32, PHY_PINS_DRIVE::Register>),
        /// USB PHY Configuration
        (0x0084 => pub(crate) phy_config: ReadWrite<u32, PHY_CONFIG::Register>),
        /// USB wake module control for suspend / resume
        (0x0088 => pub(crate) wake_control: ReadWrite<u32, WAKE_CONTROL::Register>),
        /// USB wake module events and debug
        (0x008c => pub(crate) wake_events: ReadWrite<u32, WAKE_EVENTS::Register>),
        (0x0090 => _reserved1),
        /// Memory area: 2 kB packet buffer. Divided into 32 64-byte buffers.
        (0x0800 => pub(crate) buffer: [ReadWrite<u32>; 512]),
        (0x1000 => @END),
    }
}

register_bitfields![u32,
    /// Common Interrupt Offsets
    pub(crate) INTR [
        PKT_RECEIVED OFFSET(0) NUMBITS(1) [],
        PKT_SENT OFFSET(1) NUMBITS(1) [],
        DISCONNECTED OFFSET(2) NUMBITS(1) [],
        HOST_LOST OFFSET(3) NUMBITS(1) [],
        LINK_RESET OFFSET(4) NUMBITS(1) [],
        LINK_SUSPEND OFFSET(5) NUMBITS(1) [],
        LINK_RESUME OFFSET(6) NUMBITS(1) [],
        AV_EMPTY OFFSET(7) NUMBITS(1) [],
        RX_FULL OFFSET(8) NUMBITS(1) [],
        AV_OVERFLOW OFFSET(9) NUMBITS(1) [],
        LINK_IN_ERR OFFSET(10) NUMBITS(1) [],
        RX_CRC_ERR OFFSET(11) NUMBITS(1) [],
        RX_PID_ERR OFFSET(12) NUMBITS(1) [],
        RX_BITSTUFF_ERR OFFSET(13) NUMBITS(1) [],
        FRAME OFFSET(14) NUMBITS(1) [],
        POWERED OFFSET(15) NUMBITS(1) [],
        LINK_OUT_ERR OFFSET(16) NUMBITS(1) [],
    ],
    pub(crate) ALERT_TEST [
        FATAL_FAULT OFFSET(0) NUMBITS(1) [],
    ],
    pub(crate) USBCTRL [
        ENABLE OFFSET(0) NUMBITS(1) [],
        RESUME_LINK_ACTIVE OFFSET(1) NUMBITS(1) [],
        DEVICE_ADDRESS OFFSET(16) NUMBITS(7) [],
    ],
    pub(crate) EP_OUT_ENABLE [
        ENABLE_0 OFFSET(0) NUMBITS(1) [],
        ENABLE_1 OFFSET(1) NUMBITS(1) [],
        ENABLE_2 OFFSET(2) NUMBITS(1) [],
        ENABLE_3 OFFSET(3) NUMBITS(1) [],
        ENABLE_4 OFFSET(4) NUMBITS(1) [],
        ENABLE_5 OFFSET(5) NUMBITS(1) [],
        ENABLE_6 OFFSET(6) NUMBITS(1) [],
        ENABLE_7 OFFSET(7) NUMBITS(1) [],
        ENABLE_8 OFFSET(8) NUMBITS(1) [],
        ENABLE_9 OFFSET(9) NUMBITS(1) [],
        ENABLE_10 OFFSET(10) NUMBITS(1) [],
        ENABLE_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) EP_IN_ENABLE [
        ENABLE_0 OFFSET(0) NUMBITS(1) [],
        ENABLE_1 OFFSET(1) NUMBITS(1) [],
        ENABLE_2 OFFSET(2) NUMBITS(1) [],
        ENABLE_3 OFFSET(3) NUMBITS(1) [],
        ENABLE_4 OFFSET(4) NUMBITS(1) [],
        ENABLE_5 OFFSET(5) NUMBITS(1) [],
        ENABLE_6 OFFSET(6) NUMBITS(1) [],
        ENABLE_7 OFFSET(7) NUMBITS(1) [],
        ENABLE_8 OFFSET(8) NUMBITS(1) [],
        ENABLE_9 OFFSET(9) NUMBITS(1) [],
        ENABLE_10 OFFSET(10) NUMBITS(1) [],
        ENABLE_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) USBSTAT [
        FRAME OFFSET(0) NUMBITS(11) [],
        HOST_LOST OFFSET(11) NUMBITS(1) [],
        LINK_STATE OFFSET(12) NUMBITS(3) [
            DISCONNECTED = 0,
            POWERED = 1,
            POWERED_SUSPENDED = 2,
            ACTIVE = 3,
            SUSPENDED = 4,
            ACTIVE_NOSOF = 5,
            RESUMING = 6,
        ],
        SENSE OFFSET(15) NUMBITS(1) [],
        AV_DEPTH OFFSET(16) NUMBITS(4) [],
        AV_FULL OFFSET(23) NUMBITS(1) [],
        RX_DEPTH OFFSET(24) NUMBITS(4) [],
        RX_EMPTY OFFSET(31) NUMBITS(1) [],
    ],
    pub(crate) AVBUFFER [
        BUFFER OFFSET(0) NUMBITS(5) [],
    ],
    pub(crate) RXFIFO [
        BUFFER OFFSET(0) NUMBITS(5) [],
        SIZE OFFSET(8) NUMBITS(7) [],
        SETUP OFFSET(19) NUMBITS(1) [],
        EP OFFSET(20) NUMBITS(4) [],
    ],
    pub(crate) RXENABLE_SETUP [
        SETUP_0 OFFSET(0) NUMBITS(1) [],
        SETUP_1 OFFSET(1) NUMBITS(1) [],
        SETUP_2 OFFSET(2) NUMBITS(1) [],
        SETUP_3 OFFSET(3) NUMBITS(1) [],
        SETUP_4 OFFSET(4) NUMBITS(1) [],
        SETUP_5 OFFSET(5) NUMBITS(1) [],
        SETUP_6 OFFSET(6) NUMBITS(1) [],
        SETUP_7 OFFSET(7) NUMBITS(1) [],
        SETUP_8 OFFSET(8) NUMBITS(1) [],
        SETUP_9 OFFSET(9) NUMBITS(1) [],
        SETUP_10 OFFSET(10) NUMBITS(1) [],
        SETUP_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) RXENABLE_OUT [
        OUT_0 OFFSET(0) NUMBITS(1) [],
        OUT_1 OFFSET(1) NUMBITS(1) [],
        OUT_2 OFFSET(2) NUMBITS(1) [],
        OUT_3 OFFSET(3) NUMBITS(1) [],
        OUT_4 OFFSET(4) NUMBITS(1) [],
        OUT_5 OFFSET(5) NUMBITS(1) [],
        OUT_6 OFFSET(6) NUMBITS(1) [],
        OUT_7 OFFSET(7) NUMBITS(1) [],
        OUT_8 OFFSET(8) NUMBITS(1) [],
        OUT_9 OFFSET(9) NUMBITS(1) [],
        OUT_10 OFFSET(10) NUMBITS(1) [],
        OUT_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) SET_NAK_OUT [
        ENABLE_0 OFFSET(0) NUMBITS(1) [],
        ENABLE_1 OFFSET(1) NUMBITS(1) [],
        ENABLE_2 OFFSET(2) NUMBITS(1) [],
        ENABLE_3 OFFSET(3) NUMBITS(1) [],
        ENABLE_4 OFFSET(4) NUMBITS(1) [],
        ENABLE_5 OFFSET(5) NUMBITS(1) [],
        ENABLE_6 OFFSET(6) NUMBITS(1) [],
        ENABLE_7 OFFSET(7) NUMBITS(1) [],
        ENABLE_8 OFFSET(8) NUMBITS(1) [],
        ENABLE_9 OFFSET(9) NUMBITS(1) [],
        ENABLE_10 OFFSET(10) NUMBITS(1) [],
        ENABLE_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) IN_SENT [
        SENT_0 OFFSET(0) NUMBITS(1) [],
        SENT_1 OFFSET(1) NUMBITS(1) [],
        SENT_2 OFFSET(2) NUMBITS(1) [],
        SENT_3 OFFSET(3) NUMBITS(1) [],
        SENT_4 OFFSET(4) NUMBITS(1) [],
        SENT_5 OFFSET(5) NUMBITS(1) [],
        SENT_6 OFFSET(6) NUMBITS(1) [],
        SENT_7 OFFSET(7) NUMBITS(1) [],
        SENT_8 OFFSET(8) NUMBITS(1) [],
        SENT_9 OFFSET(9) NUMBITS(1) [],
        SENT_10 OFFSET(10) NUMBITS(1) [],
        SENT_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) OUT_STALL [
        ENDPOINT_0 OFFSET(0) NUMBITS(1) [],
        ENDPOINT_1 OFFSET(1) NUMBITS(1) [],
        ENDPOINT_2 OFFSET(2) NUMBITS(1) [],
        ENDPOINT_3 OFFSET(3) NUMBITS(1) [],
        ENDPOINT_4 OFFSET(4) NUMBITS(1) [],
        ENDPOINT_5 OFFSET(5) NUMBITS(1) [],
        ENDPOINT_6 OFFSET(6) NUMBITS(1) [],
        ENDPOINT_7 OFFSET(7) NUMBITS(1) [],
        ENDPOINT_8 OFFSET(8) NUMBITS(1) [],
        ENDPOINT_9 OFFSET(9) NUMBITS(1) [],
        ENDPOINT_10 OFFSET(10) NUMBITS(1) [],
        ENDPOINT_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) IN_STALL [
        ENDPOINT_0 OFFSET(0) NUMBITS(1) [],
        ENDPOINT_1 OFFSET(1) NUMBITS(1) [],
        ENDPOINT_2 OFFSET(2) NUMBITS(1) [],
        ENDPOINT_3 OFFSET(3) NUMBITS(1) [],
        ENDPOINT_4 OFFSET(4) NUMBITS(1) [],
        ENDPOINT_5 OFFSET(5) NUMBITS(1) [],
        ENDPOINT_6 OFFSET(6) NUMBITS(1) [],
        ENDPOINT_7 OFFSET(7) NUMBITS(1) [],
        ENDPOINT_8 OFFSET(8) NUMBITS(1) [],
        ENDPOINT_9 OFFSET(9) NUMBITS(1) [],
        ENDPOINT_10 OFFSET(10) NUMBITS(1) [],
        ENDPOINT_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) CONFIGIN [
        BUFFER_0 OFFSET(0) NUMBITS(5) [],
        SIZE_0 OFFSET(8) NUMBITS(7) [],
        PEND_0 OFFSET(30) NUMBITS(1) [],
        RDY_0 OFFSET(31) NUMBITS(1) [],
    ],
    pub(crate) OUT_ISO [
        ISO_0 OFFSET(0) NUMBITS(1) [],
        ISO_1 OFFSET(1) NUMBITS(1) [],
        ISO_2 OFFSET(2) NUMBITS(1) [],
        ISO_3 OFFSET(3) NUMBITS(1) [],
        ISO_4 OFFSET(4) NUMBITS(1) [],
        ISO_5 OFFSET(5) NUMBITS(1) [],
        ISO_6 OFFSET(6) NUMBITS(1) [],
        ISO_7 OFFSET(7) NUMBITS(1) [],
        ISO_8 OFFSET(8) NUMBITS(1) [],
        ISO_9 OFFSET(9) NUMBITS(1) [],
        ISO_10 OFFSET(10) NUMBITS(1) [],
        ISO_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) IN_ISO [
        ISO_0 OFFSET(0) NUMBITS(1) [],
        ISO_1 OFFSET(1) NUMBITS(1) [],
        ISO_2 OFFSET(2) NUMBITS(1) [],
        ISO_3 OFFSET(3) NUMBITS(1) [],
        ISO_4 OFFSET(4) NUMBITS(1) [],
        ISO_5 OFFSET(5) NUMBITS(1) [],
        ISO_6 OFFSET(6) NUMBITS(1) [],
        ISO_7 OFFSET(7) NUMBITS(1) [],
        ISO_8 OFFSET(8) NUMBITS(1) [],
        ISO_9 OFFSET(9) NUMBITS(1) [],
        ISO_10 OFFSET(10) NUMBITS(1) [],
        ISO_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) DATA_TOGGLE_CLEAR [
        CLEAR_0 OFFSET(0) NUMBITS(1) [],
        CLEAR_1 OFFSET(1) NUMBITS(1) [],
        CLEAR_2 OFFSET(2) NUMBITS(1) [],
        CLEAR_3 OFFSET(3) NUMBITS(1) [],
        CLEAR_4 OFFSET(4) NUMBITS(1) [],
        CLEAR_5 OFFSET(5) NUMBITS(1) [],
        CLEAR_6 OFFSET(6) NUMBITS(1) [],
        CLEAR_7 OFFSET(7) NUMBITS(1) [],
        CLEAR_8 OFFSET(8) NUMBITS(1) [],
        CLEAR_9 OFFSET(9) NUMBITS(1) [],
        CLEAR_10 OFFSET(10) NUMBITS(1) [],
        CLEAR_11 OFFSET(11) NUMBITS(1) [],
    ],
    pub(crate) PHY_PINS_SENSE [
        RX_DP_I OFFSET(0) NUMBITS(1) [],
        RX_DN_I OFFSET(1) NUMBITS(1) [],
        RX_D_I OFFSET(2) NUMBITS(1) [],
        TX_DP_O OFFSET(8) NUMBITS(1) [],
        TX_DN_O OFFSET(9) NUMBITS(1) [],
        TX_D_O OFFSET(10) NUMBITS(1) [],
        TX_SE0_O OFFSET(11) NUMBITS(1) [],
        TX_OE_O OFFSET(12) NUMBITS(1) [],
        PWR_SENSE OFFSET(16) NUMBITS(1) [],
    ],
    pub(crate) PHY_PINS_DRIVE [
        DP_O OFFSET(0) NUMBITS(1) [],
        DN_O OFFSET(1) NUMBITS(1) [],
        D_O OFFSET(2) NUMBITS(1) [],
        SE0_O OFFSET(3) NUMBITS(1) [],
        OE_O OFFSET(4) NUMBITS(1) [],
        RX_ENABLE_O OFFSET(5) NUMBITS(1) [],
        DP_PULLUP_EN_O OFFSET(6) NUMBITS(1) [],
        DN_PULLUP_EN_O OFFSET(7) NUMBITS(1) [],
        EN OFFSET(16) NUMBITS(1) [],
    ],
    pub(crate) PHY_CONFIG [
        USE_DIFF_RCVR OFFSET(0) NUMBITS(1) [],
        TX_USE_D_SE0 OFFSET(1) NUMBITS(1) [],
        EOP_SINGLE_BIT OFFSET(2) NUMBITS(1) [],
        PINFLIP OFFSET(5) NUMBITS(1) [],
        USB_REF_DISABLE OFFSET(6) NUMBITS(1) [],
        TX_OSC_TEST_MODE OFFSET(7) NUMBITS(1) [],
    ],
    pub(crate) WAKE_CONTROL [
        SUSPEND_REQ OFFSET(0) NUMBITS(1) [],
        WAKE_ACK OFFSET(1) NUMBITS(1) [],
    ],
    pub(crate) WAKE_EVENTS [
        MODULE_ACTIVE OFFSET(0) NUMBITS(1) [],
        DISCONNECTED OFFSET(8) NUMBITS(1) [],
        BUS_RESET OFFSET(9) NUMBITS(1) [],
    ],
];

// End generated register constants for usbdev