e310_g002/
interrupts.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5//! Named interrupts for the E310-G002 chip.
6
7#![allow(dead_code)]
8
9pub const WATCHDOG: u32 = 1;
10pub const RTC: u32 = 2;
11pub const UART0: u32 = 3;
12pub const UART1: u32 = 4;
13pub const QSPI0: u32 = 5;
14pub const SPI1: u32 = 6;
15pub const SPI2: u32 = 7;
16pub const GPIO0: u32 = 8;
17pub const GPIO1: u32 = 9;
18pub const GPIO2: u32 = 10;
19pub const GPIO3: u32 = 11;
20pub const GPIO4: u32 = 12;
21pub const GPIO5: u32 = 13;
22pub const GPIO6: u32 = 14;
23pub const GPIO7: u32 = 15;
24pub const GPIO8: u32 = 16;
25pub const GPIO9: u32 = 17;
26pub const GPIO10: u32 = 18;
27pub const GPIO11: u32 = 19;
28pub const GPIO12: u32 = 20;
29pub const GPIO13: u32 = 21;
30pub const GPIO14: u32 = 22;
31pub const GPIO15: u32 = 23;
32pub const GPIO16: u32 = 24;
33pub const GPIO17: u32 = 25;
34pub const GPIO18: u32 = 26;
35pub const GPIO19: u32 = 27;
36pub const GPIO20: u32 = 28;
37pub const GPIO21: u32 = 29;
38pub const GPIO22: u32 = 30;
39pub const GPIO23: u32 = 31;
40pub const GPIO24: u32 = 32;
41pub const GPIO25: u32 = 33;
42pub const GPIO26: u32 = 34;
43pub const GPIO27: u32 = 35;
44pub const GPIO28: u32 = 36;
45pub const GPIO29: u32 = 37;
46pub const GPIO30: u32 = 38;
47pub const GPIO31: u32 = 39;
48pub const PWM0CMP0: u32 = 40;
49pub const PWM0CMP1: u32 = 41;
50pub const PWM0CMP2: u32 = 42;
51pub const PWM0CMP3: u32 = 43;
52pub const PWM1CMP0: u32 = 44;
53pub const PWM1CMP1: u32 = 45;
54pub const PWM1CMP2: u32 = 46;
55pub const PWM1CMP3: u32 = 47;
56pub const PWM2CMP0: u32 = 48;
57pub const PWM2CMP1: u32 = 49;
58pub const PWM2CMP2: u32 = 50;
59pub const PWM2CMP3: u32 = 51;
60pub const I2C: u32 = 52;