apollo3/
nvic.rs

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// Licensed under the Apache License, Version 2.0 or the MIT License.
// SPDX-License-Identifier: Apache-2.0 OR MIT
// Copyright Tock Contributors 2022.

//! Named constants for NVIC ids shared across the Apollo3 family of chips

pub const BROWNOUT: u32 = 0;
pub const WDT: u32 = 1;
pub const RTC: u32 = 2;
pub const VCOMP: u32 = 3;
pub const IOSLAVE: u32 = 4;
pub const IOSLAVEACC: u32 = 5;
pub const IOMSTR0: u32 = 6;
pub const IOMSTR1: u32 = 7;
pub const IOMSTR2: u32 = 8;
pub const IOMSTR3: u32 = 9;
pub const IOMSTR4: u32 = 10;
pub const IOMSTR5: u32 = 11;
pub const BLE: u32 = 12;
pub const GPIO: u32 = 13;
pub const CTIMER: u32 = 14;
pub const UART0: u32 = 15;
pub const UART1: u32 = 16;
pub const SCARD: u32 = 17;
pub const ADC: u32 = 18;
pub const PDM: u32 = 19;
pub const MSPI: u32 = 20;
pub const STIMER: u32 = 22;
pub const STIMER_CMPR0: u32 = 23;
pub const STIMER_CMPR1: u32 = 24;
pub const STIMER_CMPR2: u32 = 25;
pub const STIMER_CMPR3: u32 = 26;
pub const STIMER_CMPR4: u32 = 27;
pub const STIMER_CMPR5: u32 = 28;
pub const STIMER_CMPR6: u32 = 29;
pub const STIMER_CMPR7: u32 = 30;
pub const CLKGEN: u32 = 31;