riscv/csr/
pmpconfig.rs

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
// Licensed under the Apache License, Version 2.0 or the MIT License.
// SPDX-License-Identifier: Apache-2.0 OR MIT
// Copyright Tock Contributors 2022.

use kernel::utilities::registers::register_bitfields;

// Default to 32 bit if compiling for debug/testing.
#[cfg(any(
    target_arch = "riscv32",
    all(not(target_arch = "riscv32"), not(target_arch = "riscv64"))
))]
register_bitfields![usize,
    pub pmpcfg [
        r0 OFFSET(0) NUMBITS(1) [],
        w0 OFFSET(1) NUMBITS(1) [],
        x0 OFFSET(2) NUMBITS(1) [],
        a0 OFFSET(3) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l0 OFFSET(7) NUMBITS(1) [],

        r1 OFFSET(8) NUMBITS(1) [],
        w1 OFFSET(9) NUMBITS(1) [],
        x1 OFFSET(10) NUMBITS(1) [],
        a1 OFFSET(11) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l1 OFFSET(15) NUMBITS(1) [],

        r2 OFFSET(16) NUMBITS(1) [],
        w2 OFFSET(17) NUMBITS(1) [],
        x2 OFFSET(18) NUMBITS(1) [],
        a2 OFFSET(19) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l2 OFFSET(23) NUMBITS(1) [],

        r3 OFFSET(24) NUMBITS(1) [],
        w3 OFFSET(25) NUMBITS(1) [],
        x3 OFFSET(26) NUMBITS(1) [],
        a3 OFFSET(27) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l3 OFFSET(31) NUMBITS(1) []
    ]
];

#[cfg(target_arch = "riscv64")]
register_bitfields![usize,
    pub pmpcfg [
        r0 OFFSET(0) NUMBITS(1) [],
        w0 OFFSET(1) NUMBITS(1) [],
        x0 OFFSET(2) NUMBITS(1) [],
        a0 OFFSET(3) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l0 OFFSET(7) NUMBITS(1) [],

        r1 OFFSET(8) NUMBITS(1) [],
        w1 OFFSET(9) NUMBITS(1) [],
        x1 OFFSET(10) NUMBITS(1) [],
        a1 OFFSET(11) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l1 OFFSET(15) NUMBITS(1) [],

        r2 OFFSET(16) NUMBITS(1) [],
        w2 OFFSET(17) NUMBITS(1) [],
        x2 OFFSET(18) NUMBITS(1) [],
        a2 OFFSET(19) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l2 OFFSET(23) NUMBITS(1) [],

        r3 OFFSET(24) NUMBITS(1) [],
        w3 OFFSET(25) NUMBITS(1) [],
        x3 OFFSET(26) NUMBITS(1) [],
        a3 OFFSET(27) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l3 OFFSET(31) NUMBITS(1) [],

        r4 OFFSET(32) NUMBITS(1) [],
        w4 OFFSET(33) NUMBITS(1) [],
        x4 OFFSET(34) NUMBITS(1) [],
        a4 OFFSET(35) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l4 OFFSET(39) NUMBITS(1) [],

        r5 OFFSET(40) NUMBITS(1) [],
        w5 OFFSET(41) NUMBITS(1) [],
        x5 OFFSET(42) NUMBITS(1) [],
        a5 OFFSET(43) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l5 OFFSET(47) NUMBITS(1) [],

        r6 OFFSET(48) NUMBITS(1) [],
        w6 OFFSET(49) NUMBITS(1) [],
        x6 OFFSET(50) NUMBITS(1) [],
        a6 OFFSET(51) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l6 OFFSET(55) NUMBITS(1) [],

        r7 OFFSET(56) NUMBITS(1) [],
        w7 OFFSET(57) NUMBITS(1) [],
        x7 OFFSET(58) NUMBITS(1) [],
        a7 OFFSET(59) NUMBITS(2) [
            OFF = 0,
            TOR = 1,
            NA4 = 2,
            NAPOT = 3
        ],
        l7 OFFSET(63) NUMBITS(1) []
    ]
];