1#![no_std]
10
11pub mod acifc;
12pub mod adc;
13pub mod aes;
14pub mod ast;
15pub mod bpm;
16pub mod bscif;
17pub mod chip;
18pub mod crccu;
19pub mod dac;
20pub mod dma;
21pub mod eic;
22pub mod flashcalw;
23pub mod gloc;
24pub mod gpio;
25pub mod i2c;
26pub mod nvic;
27pub mod pm;
28pub mod scif;
29pub mod serial_num;
30pub mod spi;
31pub mod trng;
32pub mod usart;
33pub mod usbc;
34pub mod wdt;
35
36use cortexm4::{initialize_ram_jump_to_main, unhandled_interrupt, CortexM4, CortexMVariant};
37
38extern "C" {
39 fn _estack();
42}
43
44#[cfg_attr(
45 all(target_arch = "arm", target_os = "none"),
46 link_section = ".vectors"
47)]
48#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
50pub static BASE_VECTORS: [unsafe extern "C" fn(); 16] = [
51 _estack,
52 initialize_ram_jump_to_main,
53 unhandled_interrupt, CortexM4::HARD_FAULT_HANDLER, unhandled_interrupt, unhandled_interrupt, unhandled_interrupt, unhandled_interrupt,
59 unhandled_interrupt,
60 unhandled_interrupt,
61 unhandled_interrupt,
62 CortexM4::SVC_HANDLER, unhandled_interrupt, unhandled_interrupt,
65 unhandled_interrupt, CortexM4::SYSTICK_HANDLER, ];
68
69#[cfg_attr(
70 all(target_arch = "arm", target_os = "none"),
71 link_section = ".vectors"
72)]
73#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
75pub static IRQS: [unsafe extern "C" fn(); 80] = [CortexM4::GENERIC_ISR; 80];
76
77pub unsafe fn init() {
78 cortexm4::nvic::disable_all();
79 cortexm4::nvic::clear_all_pending();
80 cortexm4::nvic::enable_all();
81}