sam4l/
lib.rs

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1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5//! Peripheral implementations for the SAM4L MCU.
6//!
7//! <http://www.atmel.com/microsite/sam4l/default.aspx>
8
9#![crate_name = "sam4l"]
10#![crate_type = "rlib"]
11#![no_std]
12
13pub mod acifc;
14pub mod adc;
15pub mod aes;
16pub mod ast;
17pub mod bpm;
18pub mod bscif;
19pub mod chip;
20pub mod crccu;
21pub mod dac;
22pub mod dma;
23pub mod eic;
24pub mod flashcalw;
25pub mod gloc;
26pub mod gpio;
27pub mod i2c;
28pub mod nvic;
29pub mod pm;
30pub mod scif;
31pub mod serial_num;
32pub mod spi;
33pub mod trng;
34pub mod usart;
35pub mod usbc;
36pub mod wdt;
37
38use cortexm4::{initialize_ram_jump_to_main, unhandled_interrupt, CortexM4, CortexMVariant};
39
40extern "C" {
41    // _estack is not really a function, but it makes the types work
42    // You should never actually invoke it!!
43    fn _estack();
44}
45
46#[cfg_attr(
47    all(target_arch = "arm", target_os = "none"),
48    link_section = ".vectors"
49)]
50// used Ensures that the symbol is kept until the final binary
51#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
52pub static BASE_VECTORS: [unsafe extern "C" fn(); 16] = [
53    _estack,
54    initialize_ram_jump_to_main,
55    unhandled_interrupt,          // NMI
56    CortexM4::HARD_FAULT_HANDLER, // Hard Fault
57    unhandled_interrupt,          // MemManage
58    unhandled_interrupt,          // BusFault
59    unhandled_interrupt,          // UsageFault
60    unhandled_interrupt,
61    unhandled_interrupt,
62    unhandled_interrupt,
63    unhandled_interrupt,
64    CortexM4::SVC_HANDLER, // SVC
65    unhandled_interrupt,   // DebugMon
66    unhandled_interrupt,
67    unhandled_interrupt,       // PendSV
68    CortexM4::SYSTICK_HANDLER, // SysTick
69];
70
71#[cfg_attr(
72    all(target_arch = "arm", target_os = "none"),
73    link_section = ".vectors"
74)]
75// used Ensures that the symbol is kept until the final binary
76#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
77pub static IRQS: [unsafe extern "C" fn(); 80] = [CortexM4::GENERIC_ISR; 80];
78
79pub unsafe fn init() {
80    cortexm4::nvic::disable_all();
81    cortexm4::nvic::clear_all_pending();
82    cortexm4::nvic::enable_all();
83}
sam4l/lib.rs

sam4l/
lib.rs
