apollo3/
stimer.rs

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
// Licensed under the Apache License, Version 2.0 or the MIT License.
// SPDX-License-Identifier: Apache-2.0 OR MIT
// Copyright Tock Contributors 2022.

//! STimer driver for the Apollo3

use kernel::hil::time::{
    Alarm, AlarmClient, Counter, Freq16KHz, OverflowClient, Ticks, Ticks32, Time,
};
use kernel::utilities::cells::OptionalCell;
use kernel::utilities::registers::interfaces::{ReadWriteable, Readable, Writeable};
use kernel::utilities::registers::{register_bitfields, register_structs, ReadWrite};
use kernel::utilities::StaticRef;
use kernel::ErrorCode;

const STIMER_BASE: StaticRef<STimerRegisters> =
    unsafe { StaticRef::new(0x4000_8000 as *const STimerRegisters) };

register_structs! {
    pub STimerRegisters {
        (0x000 => _reserved0),
        (0x140 => stcfg: ReadWrite<u32, STCFG::Register>),
        (0x144 => sttmr: ReadWrite<u32, STTMR::Register>),
        (0x148 => capturecontrol: ReadWrite<u32, CAPTURECONTROL::Register>),
        (0x14C => _reserved1),
        (0x150 => scmpr: [ReadWrite<u32, SCMPR::Register>; 8]),
        (0x170 => _reserved2),
        (0x1E0 => scapt: [ReadWrite<u32, SCAPT::Register>; 4]),
        (0x1F0 => snvr: [ReadWrite<u32, SNVR::Register>; 4]),
        (0x200 => _reserved3),
        (0x300 => stminten: ReadWrite<u32, STMINT::Register>),
        (0x304 => stmintstat: ReadWrite<u32, STMINT::Register>),
        (0x308 => stmintclr: ReadWrite<u32, STMINT::Register>),
        (0x30C => stmintset: ReadWrite<u32, STMINT::Register>),
        (0x310 => @END),
    }
}

register_bitfields![u32,
    STCFG [
        CLKSEL OFFSET(0) NUMBITS(4) [
            NOCLK = 0x0,
            HRFC_DIV16 = 0x1,
            HRFC_DIV256 = 0x2,
            XTAL_DIV1 = 0x3,
            XTAL_DIV2 = 0x4,
            XTAL_DIV32 = 0x5,
            LFRC_DIV1 = 0x6,
            CTIMER0A = 0x7,
            CTIMER0B = 0x8
        ],
        COMPARE_A_EN OFFSET(8) NUMBITS(1) [],
        COMPARE_B_EN OFFSET(9) NUMBITS(1) [],
        COMPARE_C_EN OFFSET(10) NUMBITS(1) [],
        COMPARE_D_EN OFFSET(11) NUMBITS(1) [],
        COMPARE_E_EN OFFSET(12) NUMBITS(1) [],
        COMPARE_F_EN OFFSET(13) NUMBITS(1) [],
        COMPARE_G_EN OFFSET(14) NUMBITS(1) [],
        COMPARE_H_EN OFFSET(15) NUMBITS(1) [],
        CLEAR OFFSET(30) NUMBITS(1) [],
        FREEZE OFFSET(31) NUMBITS(1) []
    ],
    STTMR [
        STTMR OFFSET(0) NUMBITS(31) []
    ],
    CAPTURECONTROL [
        CAPTURE0 OFFSET(0) NUMBITS(1) [],
        CAPTURE1 OFFSET(1) NUMBITS(1) [],
        CAPTURE2 OFFSET(2) NUMBITS(1) [],
        CAPTURE3 OFFSET(3) NUMBITS(1) []
    ],
    SCMPR [
        SCMPR OFFSET(0) NUMBITS(31) []
    ],
    SCAPT [
        SCATP OFFSET(0) NUMBITS(31) []
    ],
    SNVR [
        SNVR OFFSET(0) NUMBITS(31) []
    ],
    STMINT [
        COMPAREA OFFSET(0) NUMBITS(1) [],
        COMPAREB OFFSET(1) NUMBITS(1) [],
        COMPAREC OFFSET(2) NUMBITS(1) [],
        COMPARED OFFSET(3) NUMBITS(1) [],
        COMPAREE OFFSET(4) NUMBITS(1) [],
        COMPAREF OFFSET(5) NUMBITS(1) [],
        COMPAREG OFFSET(6) NUMBITS(1) [],
        COMPAREH OFFSET(7) NUMBITS(1) [],
        OVERFLOW OFFSET(8) NUMBITS(1) [],
        CAPTUREA OFFSET(9) NUMBITS(1) [],
        CAPTUREB OFFSET(10) NUMBITS(1) [],
        CAPTUREC OFFSET(11) NUMBITS(1) [],
        CAPTURED OFFSET(12) NUMBITS(1) []
    ]
];

pub struct STimer<'a> {
    registers: StaticRef<STimerRegisters>,
    client: OptionalCell<&'a dyn AlarmClient>,
}

impl<'a> STimer<'a> {
    // Unsafe bc of use of STIMER_BASE internally
    pub fn new() -> STimer<'a> {
        let timer = STimer {
            registers: STIMER_BASE,
            client: OptionalCell::empty(),
        };

        // Reset so that time starts at 0
        let _ = timer.reset();

        timer
    }

    pub fn handle_interrupt(&self) {
        let regs = self.registers;

        // Disable timer
        regs.stcfg
            .modify(STCFG::COMPARE_A_EN::CLEAR + STCFG::COMPARE_B_EN::CLEAR);

        // Disable interrupt
        regs.stminten
            .modify(STMINT::COMPAREA::CLEAR + STMINT::COMPAREB::CLEAR);

        // Clear interrupt
        regs.stmintclr
            .modify(STMINT::COMPAREA::SET + STMINT::COMPAREB::SET);

        self.client.map(|client| client.alarm());
    }
}

impl Time for STimer<'_> {
    type Frequency = Freq16KHz;
    type Ticks = Ticks32;

    fn now(&self) -> Ticks32 {
        Ticks32::from(self.registers.sttmr.get())
    }
}

impl<'a> Counter<'a> for STimer<'a> {
    fn set_overflow_client(&self, _client: &'a dyn OverflowClient) {
        //self.overflow_client.set(client);
    }

    fn start(&self) -> Result<(), ErrorCode> {
        // Set the clock source
        self.registers.stcfg.write(STCFG::CLKSEL::XTAL_DIV2);
        Ok(())
    }

    fn stop(&self) -> Result<(), ErrorCode> {
        Err(ErrorCode::BUSY)
    }

    fn reset(&self) -> Result<(), ErrorCode> {
        self.registers.stcfg.write(STCFG::CLEAR::SET);
        Ok(())
    }

    fn is_running(&self) -> bool {
        let regs = self.registers;
        regs.stcfg.matches_any(&[STCFG::CLKSEL::XTAL_DIV2])
    }
}

impl<'a> Alarm<'a> for STimer<'a> {
    fn set_alarm_client(&self, client: &'a dyn AlarmClient) {
        self.client.set(client);
    }

    fn set_alarm(&self, reference: Self::Ticks, dt: Self::Ticks) {
        let regs = self.registers;
        let now = self.now();
        // Errata 4.22: Sometimes the clock can increment twice
        // This means the timer occurs earlier then actually requested
        // From testing this scaling results in the correct time, so we
        // scale the requested ticks to give us an accurate alarm.
        let scaled_time = Self::Ticks::from(((dt.into_u32() as u64 * 1000) / (1000 - 32)) as u32);
        let expire = reference.wrapping_add(scaled_time);

        // Disable the compare
        regs.stcfg
            .modify(STCFG::COMPARE_A_EN::CLEAR + STCFG::COMPARE_B_EN::CLEAR);

        // Enable interrupts
        regs.stminten
            .modify(STMINT::COMPAREA::SET + STMINT::COMPAREB::SET);

        // Check if the alarm has already expired or if it will expire before we set
        // the compare.
        if !now.within_range(reference, expire) || expire.wrapping_sub(now) < self.minimum_dt() {
            // The alarm has already expired!
            // Let's set the interrupt manually
            regs.stcfg.modify(STCFG::COMPARE_A_EN::SET);
            regs.stmintset.modify(STMINT::COMPAREA::SET);
            return;
        }

        // Set the delta, this can take a few goes
        // See Errata 4.14 at at https://ambiq.com/wp-content/uploads/2022/01/Apollo3-Blue-Errata-List.pdf
        let mut timer_delta = expire.wrapping_sub(now);
        let mut tries = 0;

        // Apollo3 Blue Datasheet 14.1: 'Only offsets from "NOW" are written to
        // comparator registers.'
        while Self::Ticks::from(regs.scmpr[0].get()) != expire && tries < 5 {
            regs.scmpr[0].set(timer_delta.into_u32());
            tries += 1;
        }

        // Timers can be missed, so set a second one a little larger
        // See Errata 4.22 at at https://ambiq.com/wp-content/uploads/2022/01/Apollo3-Blue-Errata-List.pdf
        timer_delta = timer_delta.wrapping_add(1.into());
        tries = 0;

        while Self::Ticks::from(regs.scmpr[1].get()) != expire && tries < 5 {
            regs.scmpr[1].set(timer_delta.into_u32());
            tries += 1;
        }

        // Enable the compare
        regs.stcfg
            .modify(STCFG::COMPARE_A_EN::SET + STCFG::COMPARE_B_EN::SET);
    }

    fn get_alarm(&self) -> Self::Ticks {
        let regs = self.registers;
        Self::Ticks::from(regs.scmpr[0].get())
    }

    fn disarm(&self) -> Result<(), ErrorCode> {
        let regs = self.registers;

        regs.stcfg.modify(
            STCFG::COMPARE_A_EN::CLEAR
                + STCFG::COMPARE_B_EN::CLEAR
                + STCFG::COMPARE_C_EN::CLEAR
                + STCFG::COMPARE_D_EN::CLEAR
                + STCFG::COMPARE_E_EN::CLEAR
                + STCFG::COMPARE_F_EN::CLEAR
                + STCFG::COMPARE_G_EN::CLEAR
                + STCFG::COMPARE_H_EN::CLEAR,
        );
        Ok(())
    }

    fn is_armed(&self) -> bool {
        let regs = self.registers;

        regs.stcfg.read(STCFG::COMPARE_A_EN) != 0
    }

    fn minimum_dt(&self) -> Self::Ticks {
        Self::Ticks::from(5)
    }
}