1use core::fmt::Write;
8use kernel::platform::chip::Chip;
9use kernel::platform::chip::InterruptService;
10
11use crate::adc;
12use crate::clocks::Clocks;
13use crate::gpio::{RPGpio, RPPins, SIO};
14use crate::i2c;
15use crate::interrupts;
16use crate::pio::Pio;
17use crate::pwm;
18use crate::resets::Resets;
19use crate::rtc;
20use crate::spi;
21use crate::sysinfo;
22use crate::timer::RPTimer;
23use crate::uart::Uart;
24use crate::usb;
25use crate::watchdog::Watchdog;
26use crate::xosc::Xosc;
27use cortexm0p::{interrupt_mask, CortexM0P, CortexMVariant};
28
29#[repr(u8)]
30pub enum Processor {
31 Processor0 = 0,
32 Processor1 = 1,
33}
34
35pub struct Rp2040<'a, I: InterruptService + 'a> {
36 mpu: cortexm0p::mpu::MPU,
37 userspace_kernel_boundary: cortexm0p::syscall::SysCall,
38 interrupt_service: &'a I,
39 sio: &'a SIO,
40 processor0_interrupt_mask: (u128, u128),
41 processor1_interrupt_mask: (u128, u128),
42}
43
44impl<'a, I: InterruptService> Rp2040<'a, I> {
45 pub unsafe fn new(interrupt_service: &'a I, sio: &'a SIO) -> Self {
46 Self {
47 mpu: cortexm0p::mpu::new(),
48 userspace_kernel_boundary: cortexm0p::syscall::SysCall::new(),
49 interrupt_service,
50 sio,
51 processor0_interrupt_mask: interrupt_mask!(interrupts::SIO_IRQ_PROC1),
52 processor1_interrupt_mask: interrupt_mask!(interrupts::SIO_IRQ_PROC0),
53 }
54 }
55}
56
57impl<I: InterruptService> Chip for Rp2040<'_, I> {
58 type MPU = cortexm0p::mpu::MPU;
59 type UserspaceKernelBoundary = cortexm0p::syscall::SysCall;
60
61 fn service_pending_interrupts(&self) {
62 unsafe {
63 let mask = match self.sio.get_processor() {
64 Processor::Processor0 => self.processor0_interrupt_mask,
65 Processor::Processor1 => self.processor1_interrupt_mask,
66 };
67 while let Some(interrupt) = cortexm0p::nvic::next_pending_with_mask(mask) {
68 if !self.interrupt_service.service_interrupt(interrupt) {
72 panic!("unhandled interrupt {}", interrupt);
73 }
74 let n = cortexm0p::nvic::Nvic::new(interrupt);
75 n.clear_pending();
76 n.enable();
77 }
78 }
79 }
80
81 fn has_pending_interrupts(&self) -> bool {
82 let mask = match self.sio.get_processor() {
86 Processor::Processor0 => self.processor0_interrupt_mask,
87 Processor::Processor1 => self.processor1_interrupt_mask,
88 };
89 unsafe { cortexm0p::nvic::has_pending_with_mask(mask) }
90 }
91
92 fn mpu(&self) -> &Self::MPU {
93 &self.mpu
94 }
95
96 fn userspace_kernel_boundary(&self) -> &Self::UserspaceKernelBoundary {
97 &self.userspace_kernel_boundary
98 }
99
100 fn sleep(&self) {
101 unsafe {
102 cortexm0p::support::wfi();
103 }
104 }
105
106 unsafe fn atomic<F, R>(&self, f: F) -> R
107 where
108 F: FnOnce() -> R,
109 {
110 cortexm0p::support::atomic(f)
111 }
112
113 unsafe fn print_state(&self, writer: &mut dyn Write) {
114 CortexM0P::print_cortexm_state(writer);
115 }
116}
117
118pub struct Rp2040DefaultPeripherals<'a> {
119 pub adc: adc::Adc<'a>,
120 pub clocks: Clocks,
121 pub i2c0: i2c::I2c<'a, 'a>,
122 pub pins: RPPins<'a>,
123 pub pio0: Pio,
124 pub pio1: Pio,
125 pub pwm: pwm::Pwm<'a>,
126 pub resets: Resets,
127 pub sio: SIO,
128 pub spi0: spi::Spi<'a>,
129 pub sysinfo: sysinfo::SysInfo,
130 pub timer: RPTimer<'a>,
131 pub uart0: Uart<'a>,
132 pub uart1: Uart<'a>,
133 pub usb: usb::UsbCtrl<'a>,
134 pub watchdog: Watchdog<'a>,
135 pub xosc: Xosc,
136 pub rtc: rtc::Rtc<'a>,
137}
138
139impl Rp2040DefaultPeripherals<'_> {
140 pub fn new() -> Self {
141 Self {
142 adc: adc::Adc::new(),
143 clocks: Clocks::new(),
144 i2c0: i2c::I2c::new_i2c0(),
145 pins: RPPins::new(),
146 pio0: Pio::new_pio0(),
147 pio1: Pio::new_pio1(),
148 pwm: pwm::Pwm::new(),
149 resets: Resets::new(),
150 sio: SIO::new(),
151 spi0: spi::Spi::new_spi0(),
152 sysinfo: sysinfo::SysInfo::new(),
153 timer: RPTimer::new(),
154 uart0: Uart::new_uart0(),
155 uart1: Uart::new_uart1(),
156 usb: usb::UsbCtrl::new(),
157 watchdog: Watchdog::new(),
158 xosc: Xosc::new(),
159 rtc: rtc::Rtc::new(),
160 }
161 }
162
163 pub fn resolve_dependencies(&'static self) {
164 self.pwm.set_clocks(&self.clocks);
165 self.watchdog.resolve_dependencies(&self.resets);
166 self.spi0.set_clocks(&self.clocks);
167 self.uart0.set_clocks(&self.clocks);
168 kernel::deferred_call::DeferredCallClient::register(&self.uart0);
169 kernel::deferred_call::DeferredCallClient::register(&self.uart1);
170 kernel::deferred_call::DeferredCallClient::register(&self.rtc);
171 self.i2c0.resolve_dependencies(&self.clocks, &self.resets);
172 self.usb.set_gpio(self.pins.get_pin(RPGpio::GPIO15));
173 self.rtc.set_clocks(&self.clocks);
174 }
175}
176
177impl InterruptService for Rp2040DefaultPeripherals<'_> {
178 unsafe fn service_interrupt(&self, interrupt: u32) -> bool {
179 match interrupt {
180 interrupts::PIO0_IRQ_0 => {
181 self.pio0.handle_interrupt();
182 true
183 }
184 interrupts::TIMER_IRQ_0 => {
185 self.timer.handle_interrupt();
186 true
187 }
188 interrupts::SIO_IRQ_PROC0 => {
189 self.sio.handle_proc_interrupt(Processor::Processor0);
190 true
191 }
192 interrupts::SIO_IRQ_PROC1 => {
193 self.sio.handle_proc_interrupt(Processor::Processor1);
194 true
195 }
196 interrupts::SPI0_IRQ => {
197 self.spi0.handle_interrupt();
198 true
199 }
200 interrupts::UART0_IRQ => {
201 self.uart0.handle_interrupt();
202 true
203 }
204 interrupts::ADC_IRQ_FIFO => {
205 self.adc.handle_interrupt();
206 true
207 }
208 interrupts::USBCTRL_IRQ => {
209 self.usb.handle_interrupt();
210 true
211 }
212 interrupts::IO_IRQ_BANK0 => {
213 self.pins.handle_interrupt();
214 true
215 }
216
217 interrupts::I2C0_IRQ => {
218 self.i2c0.handle_interrupt();
219 true
220 }
221 interrupts::PWM_IRQ_WRAP => {
222 true
227 }
228 _ => false,
229 }
230 }
231}