1#![no_std]
10
11pub mod chip;
12pub mod nvic;
13
14pub mod adc;
16pub mod dma;
17pub mod exti;
18pub mod flash;
19pub mod gpio;
20pub mod i2c;
21pub mod rcc;
22pub mod spi;
23pub mod syscfg;
24pub mod tim2;
25pub mod usart;
26pub mod wdt;
27
28use cortexm4f::{initialize_ram_jump_to_main, unhandled_interrupt, CortexM4F, CortexMVariant};
29
30extern "C" {
31    fn _estack();
34}
35
36#[cfg_attr(
37    all(target_arch = "arm", target_os = "none"),
38    link_section = ".vectors"
39)]
40#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
42pub static BASE_VECTORS: [unsafe extern "C" fn(); 16] = [
43    _estack,
44    initialize_ram_jump_to_main,
45    unhandled_interrupt,           CortexM4F::HARD_FAULT_HANDLER, unhandled_interrupt,           unhandled_interrupt,           unhandled_interrupt,           unhandled_interrupt,
51    unhandled_interrupt,
52    unhandled_interrupt,
53    unhandled_interrupt,
54    CortexM4F::SVC_HANDLER, unhandled_interrupt,    unhandled_interrupt,
57    unhandled_interrupt,        CortexM4F::SYSTICK_HANDLER, ];
60
61#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".irqs")]
65#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
67pub static IRQS: [unsafe extern "C" fn(); 82] = [
68    CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, unhandled_interrupt,    unhandled_interrupt,    CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, CortexM4F::GENERIC_ISR, unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    unhandled_interrupt,    CortexM4F::GENERIC_ISR, ];
151
152pub unsafe fn init() {
153    cortexm4f::nvic::disable_all();
154    cortexm4f::nvic::clear_all_pending();
155    cortexm4f::nvic::enable_all();
156}