stm32f303xc/
lib.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5//! Peripheral implementations for the STM32F3xx MCU.
6//!
7//! STM32F303: <https://www.st.com/en/microcontrollers-microprocessors/stm32f303.html>
8
9#![no_std]
10
11pub mod chip;
12pub mod nvic;
13
14// Peripherals
15pub mod adc;
16pub mod dma;
17pub mod exti;
18pub mod flash;
19pub mod gpio;
20pub mod i2c;
21pub mod rcc;
22pub mod spi;
23pub mod syscfg;
24pub mod tim2;
25pub mod usart;
26pub mod wdt;
27
28use cortexm4f::{initialize_ram_jump_to_main, unhandled_interrupt, CortexM4F, CortexMVariant};
29
30extern "C" {
31    // _estack is not really a function, but it makes the types work
32    // You should never actually invoke it!!
33    fn _estack();
34}
35
36#[cfg_attr(
37    all(target_arch = "arm", target_os = "none"),
38    link_section = ".vectors"
39)]
40// used Ensures that the symbol is kept until the final binary
41#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
42pub static BASE_VECTORS: [unsafe extern "C" fn(); 16] = [
43    _estack,
44    initialize_ram_jump_to_main,
45    unhandled_interrupt,           // NMI
46    CortexM4F::HARD_FAULT_HANDLER, // Hard Fault
47    unhandled_interrupt,           // MemManage
48    unhandled_interrupt,           // BusFault
49    unhandled_interrupt,           // UsageFault
50    unhandled_interrupt,
51    unhandled_interrupt,
52    unhandled_interrupt,
53    unhandled_interrupt,
54    CortexM4F::SVC_HANDLER, // SVC
55    unhandled_interrupt,    // DebugMon
56    unhandled_interrupt,
57    unhandled_interrupt,        // PendSV
58    CortexM4F::SYSTICK_HANDLER, // SysTick
59];
60
61// STM32F303VCT6 has total of 82 interrupts
62// Extracted from `CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h`
63// NOTE: There are missing IRQn between 0 and 81
64#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".irqs")]
65// used Ensures that the symbol is kept until the final binary
66#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
67pub static IRQS: [unsafe extern "C" fn(); 82] = [
68    CortexM4F::GENERIC_ISR, // WWDG (0)
69    CortexM4F::GENERIC_ISR, // PVD (1)
70    CortexM4F::GENERIC_ISR, // TAMP_STAMP (2)
71    CortexM4F::GENERIC_ISR, // RTC_WKUP (3)
72    CortexM4F::GENERIC_ISR, // FLASH (4)
73    CortexM4F::GENERIC_ISR, // RCC (5)
74    CortexM4F::GENERIC_ISR, // EXTI0 (6)
75    CortexM4F::GENERIC_ISR, // EXTI1 (7)
76    CortexM4F::GENERIC_ISR, // EXTI2 (8)
77    CortexM4F::GENERIC_ISR, // EXTI3 (9)
78    CortexM4F::GENERIC_ISR, // EXTI4 (10)
79    CortexM4F::GENERIC_ISR, // DMA1_Stream0 (11)
80    CortexM4F::GENERIC_ISR, // DMA1_Stream1 (12)
81    CortexM4F::GENERIC_ISR, // DMA1_Stream2 (13)
82    CortexM4F::GENERIC_ISR, // DMA1_Stream3 (14)
83    CortexM4F::GENERIC_ISR, // DMA1_Stream4 (15)
84    CortexM4F::GENERIC_ISR, // DMA1_Stream5 (16)
85    CortexM4F::GENERIC_ISR, // DMA1_Stream6 (17)
86    CortexM4F::GENERIC_ISR, // ADC1_2 (18)
87    CortexM4F::GENERIC_ISR, // HP_USB or CAN1_TX (19)
88    CortexM4F::GENERIC_ISR, // LP_USB or CAN1_RX0 (20)
89    CortexM4F::GENERIC_ISR, // CAN1_RX1 (21)
90    CortexM4F::GENERIC_ISR, // CAN1_SCE (22)
91    CortexM4F::GENERIC_ISR, // EXTI9_5 (23)
92    CortexM4F::GENERIC_ISR, // TIM1_BRK_TIM9 (24)
93    CortexM4F::GENERIC_ISR, // TIM1_UP_TIM10 (25)
94    CortexM4F::GENERIC_ISR, // TIM1_TRG_COM_TIM11 (26)
95    CortexM4F::GENERIC_ISR, // TIM1_CC (27)
96    CortexM4F::GENERIC_ISR, // TIM2 (28)
97    CortexM4F::GENERIC_ISR, // TIM3 (29)
98    CortexM4F::GENERIC_ISR, // TIM4 (30)
99    CortexM4F::GENERIC_ISR, // I2C1_EV (31)
100    CortexM4F::GENERIC_ISR, // I2C1_ER (32)
101    CortexM4F::GENERIC_ISR, // I2C2_EV (33)
102    CortexM4F::GENERIC_ISR, // I2C2_ER (34)
103    CortexM4F::GENERIC_ISR, // SPI1 (35)
104    CortexM4F::GENERIC_ISR, // SPI2 (36)
105    CortexM4F::GENERIC_ISR, // USART1 (37)
106    CortexM4F::GENERIC_ISR, // USART2 (38)
107    CortexM4F::GENERIC_ISR, // USART3 (39)
108    CortexM4F::GENERIC_ISR, // EXTI15_10 (40)
109    CortexM4F::GENERIC_ISR, // RTC_Alarm (41)
110    CortexM4F::GENERIC_ISR, // USB_WKUP (42)
111    CortexM4F::GENERIC_ISR, // TIM8_BRK_TIM12 (43)
112    CortexM4F::GENERIC_ISR, // TIM8_UP_TIM13 (44)
113    CortexM4F::GENERIC_ISR, // TIM8_TRG_COM_TIM14 (45)
114    CortexM4F::GENERIC_ISR, // TIM8_CC (46)
115    CortexM4F::GENERIC_ISR, // ADC3 (47)
116    unhandled_interrupt,    // (48)
117    unhandled_interrupt,    // (49)
118    unhandled_interrupt,    // (50)
119    CortexM4F::GENERIC_ISR, // SPI3 (51)
120    CortexM4F::GENERIC_ISR, // UART4 (52)
121    CortexM4F::GENERIC_ISR, // UART5 (53)
122    CortexM4F::GENERIC_ISR, // TIM6_DAC (54)
123    CortexM4F::GENERIC_ISR, // TIM7 (55)
124    CortexM4F::GENERIC_ISR, // DMA2_Stream0 (56)
125    CortexM4F::GENERIC_ISR, // DMA2_Stream1 (57)
126    CortexM4F::GENERIC_ISR, // DMA2_Stream2 (58)
127    CortexM4F::GENERIC_ISR, // DMA2_Stream3 (59)
128    CortexM4F::GENERIC_ISR, // DMA2_Stream4 (60)
129    CortexM4F::GENERIC_ISR, // ADC4 (61)
130    unhandled_interrupt,    // (62)
131    unhandled_interrupt,    // (63)
132    CortexM4F::GENERIC_ISR, // COMP1_2_3 (64)
133    CortexM4F::GENERIC_ISR, // COMP4_5_6 (65)
134    CortexM4F::GENERIC_ISR, // COMP7 (66)
135    unhandled_interrupt,    //(67)
136    unhandled_interrupt,    //(68)
137    unhandled_interrupt,    //(69)
138    unhandled_interrupt,    //(70)
139    unhandled_interrupt,    //(71)
140    unhandled_interrupt,    //(72)
141    unhandled_interrupt,    //(73)
142    CortexM4F::GENERIC_ISR, // USB_HP (74)
143    CortexM4F::GENERIC_ISR, // USB_LP (75)
144    CortexM4F::GENERIC_ISR, // USB_RMP_WKUP (76)
145    unhandled_interrupt,    // (77)
146    unhandled_interrupt,    // (78)
147    unhandled_interrupt,    // (79)
148    unhandled_interrupt,    // (80)
149    CortexM4F::GENERIC_ISR, // FPU (81)
150];
151
152pub unsafe fn init() {
153    cortexm4f::nvic::disable_all();
154    cortexm4f::nvic::clear_all_pending();
155    cortexm4f::nvic::enable_all();
156}