stm32f401cc/
lib.rs

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1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5#![no_std]
6
7use cortexm4f::{unhandled_interrupt, CortexM4F, CortexMVariant};
8
9pub use stm32f4xx::{
10    adc, chip, clocks, dbg, dma, exti, flash, gpio, nvic, rcc, spi, syscfg, tim2, usart,
11};
12
13pub mod chip_specs;
14pub mod interrupt_service;
15
16// Extracted from RM0368 Reference manual, Table 38
17#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".irqs")]
18// "used" ensures that the symbol is kept until the final binary
19#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
20pub static IRQS: [unsafe extern "C" fn(); 85] = [
21    CortexM4F::GENERIC_ISR, // WWDG (0)
22    CortexM4F::GENERIC_ISR, // PVD (1)
23    CortexM4F::GENERIC_ISR, // TAMP_STAMP (2)
24    CortexM4F::GENERIC_ISR, // RTC_WKUP (3)
25    CortexM4F::GENERIC_ISR, // FLASH (4)
26    CortexM4F::GENERIC_ISR, // RCC (5)
27    CortexM4F::GENERIC_ISR, // EXTI0 (6)
28    CortexM4F::GENERIC_ISR, // EXTI1 (7)
29    CortexM4F::GENERIC_ISR, // EXTI2 (8)
30    CortexM4F::GENERIC_ISR, // EXTI3 (9)
31    CortexM4F::GENERIC_ISR, // EXTI4 (10)
32    CortexM4F::GENERIC_ISR, // DMA1_Stream0 (11)
33    CortexM4F::GENERIC_ISR, // DMA1_Stream1 (12)
34    CortexM4F::GENERIC_ISR, // DMA1_Stream2 (13)
35    CortexM4F::GENERIC_ISR, // DMA1_Stream3 (14)
36    CortexM4F::GENERIC_ISR, // DMA1_Stream4 (15)
37    CortexM4F::GENERIC_ISR, // DMA1_Stream5 (16)
38    CortexM4F::GENERIC_ISR, // DMA1_Stream6 (17)
39    CortexM4F::GENERIC_ISR, // ADC (18)
40    unhandled_interrupt,    // (19)
41    unhandled_interrupt,    // (20)
42    unhandled_interrupt,    // (21)
43    unhandled_interrupt,    // (22)
44    CortexM4F::GENERIC_ISR, // EXTI9_5 (23)
45    CortexM4F::GENERIC_ISR, // TIM1_BRK_TIM9 (24)
46    CortexM4F::GENERIC_ISR, // TIM1_UP_TIM10 (25)
47    CortexM4F::GENERIC_ISR, // TIM1_TRG_COM_TIM11 (26)
48    CortexM4F::GENERIC_ISR, // TIM1_CC (27)
49    CortexM4F::GENERIC_ISR, // TIM2 (28)
50    CortexM4F::GENERIC_ISR, // TIM3 (29)
51    CortexM4F::GENERIC_ISR, // TIM4 (30)
52    CortexM4F::GENERIC_ISR, // I2C1_EV (31)
53    CortexM4F::GENERIC_ISR, // I2C1_ER (32)
54    CortexM4F::GENERIC_ISR, // I2C2_EV (33)
55    CortexM4F::GENERIC_ISR, // I2C2_ER (34)
56    CortexM4F::GENERIC_ISR, // SPI1 (35)
57    CortexM4F::GENERIC_ISR, // SPI2 (36)
58    CortexM4F::GENERIC_ISR, // USART1 (37)
59    CortexM4F::GENERIC_ISR, // USART2 (38)
60    CortexM4F::GENERIC_ISR, // USART3 (39)
61    CortexM4F::GENERIC_ISR, // EXTI15_10 (40)
62    CortexM4F::GENERIC_ISR, // RTC_Alarm (41)
63    CortexM4F::GENERIC_ISR, // OTG_FS_WKUP (42)
64    unhandled_interrupt,    // (43)
65    unhandled_interrupt,    // (44)
66    unhandled_interrupt,    // (45)
67    unhandled_interrupt,    // (45)
68    CortexM4F::GENERIC_ISR, // DMA1_Stream7 (47)
69    unhandled_interrupt,    // (48)
70    CortexM4F::GENERIC_ISR, // SDIO (49)
71    CortexM4F::GENERIC_ISR, // TIM5 (50)
72    CortexM4F::GENERIC_ISR, // SPI3 (51)
73    unhandled_interrupt,    // (52)
74    unhandled_interrupt,    // (53)
75    unhandled_interrupt,    // (54)
76    unhandled_interrupt,    // (55)
77    CortexM4F::GENERIC_ISR, // DMA2_Stream0 (56)
78    CortexM4F::GENERIC_ISR, // DMA2_Stream1 (57)
79    CortexM4F::GENERIC_ISR, // DMA2_Stream2 (58)
80    CortexM4F::GENERIC_ISR, // DMA2_Stream3 (59)
81    CortexM4F::GENERIC_ISR, // DMA2_Stream4 (60)
82    unhandled_interrupt,    // (61)
83    unhandled_interrupt,    // (62)
84    unhandled_interrupt,    // (63)
85    unhandled_interrupt,    // (64)
86    unhandled_interrupt,    // (65)
87    unhandled_interrupt,    // (66)
88    CortexM4F::GENERIC_ISR, // OTG_FS (67)
89    CortexM4F::GENERIC_ISR, // DMA2_Stream5 (68)
90    CortexM4F::GENERIC_ISR, // DMA2_Stream6 (69)
91    CortexM4F::GENERIC_ISR, // DMA2_Stream7 (70)
92    CortexM4F::GENERIC_ISR, // USART6 (71)
93    CortexM4F::GENERIC_ISR, // I2C3_EV (72)
94    CortexM4F::GENERIC_ISR, // I2C3_ER (73)
95    unhandled_interrupt,    // (74)
96    unhandled_interrupt,    // (75)
97    unhandled_interrupt,    // (76)
98    unhandled_interrupt,    // (77)
99    unhandled_interrupt,    // (78)
100    unhandled_interrupt,    // (79)
101    unhandled_interrupt,    // (80)
102    CortexM4F::GENERIC_ISR, // FPU (81)
103    unhandled_interrupt,    // (82)
104    unhandled_interrupt,    // (83)
105    CortexM4F::GENERIC_ISR, // SPI4 (84)
106];
107
108pub unsafe fn init() {
109    stm32f4xx::init();
110}
stm32f401cc/lib.rs

stm32f401cc/
lib.rs
