nucleo_f429zi/
io.rs
1use core::fmt::Write;
6use core::panic::PanicInfo;
7use core::ptr::addr_of;
8use core::ptr::addr_of_mut;
9
10use kernel::debug;
11use kernel::debug::IoWrite;
12use kernel::hil::led;
13use kernel::hil::uart;
14use kernel::hil::uart::Configure;
15
16use stm32f429zi::chip_specs::Stm32f429Specs;
17use stm32f429zi::gpio::PinId;
18
19use crate::CHIP;
20use crate::PROCESSES;
21use crate::PROCESS_PRINTER;
22
23pub struct Writer {
25 initialized: bool,
26}
27
28pub static mut WRITER: Writer = Writer { initialized: false };
30
31impl Writer {
32 pub fn set_initialized(&mut self) {
35 self.initialized = true;
36 }
37}
38
39impl Write for Writer {
40 fn write_str(&mut self, s: &str) -> ::core::fmt::Result {
41 self.write(s.as_bytes());
42 Ok(())
43 }
44}
45
46impl IoWrite for Writer {
47 fn write(&mut self, buf: &[u8]) -> usize {
48 let rcc = stm32f429zi::rcc::Rcc::new();
49 let clocks: stm32f429zi::clocks::Clocks<Stm32f429Specs> =
50 stm32f429zi::clocks::Clocks::new(&rcc);
51 let uart = stm32f429zi::usart::Usart::new_usart3(&clocks);
52
53 if !self.initialized {
54 self.initialized = true;
55
56 let _ = uart.configure(uart::Parameters {
57 baud_rate: 115200,
58 stop_bits: uart::StopBits::One,
59 parity: uart::Parity::None,
60 hw_flow_control: false,
61 width: uart::Width::Eight,
62 });
63 }
64
65 for &c in buf {
66 uart.send_byte(c);
67 }
68 buf.len()
69 }
70}
71
72#[no_mangle]
74#[panic_handler]
75pub unsafe fn panic_fmt(info: &PanicInfo) -> ! {
76 let rcc = stm32f429zi::rcc::Rcc::new();
79 let clocks: stm32f429zi::clocks::Clocks<Stm32f429Specs> =
80 stm32f429zi::clocks::Clocks::new(&rcc);
81 let syscfg = stm32f429zi::syscfg::Syscfg::new(&clocks);
82 let exti = stm32f429zi::exti::Exti::new(&syscfg);
83 let pin = stm32f429zi::gpio::Pin::new(PinId::PB07, &exti);
84 let gpio_ports = stm32f429zi::gpio::GpioPorts::new(&clocks, &exti);
85 pin.set_ports_ref(&gpio_ports);
86 let led = &mut led::LedHigh::new(&pin);
87
88 let writer = &mut *addr_of_mut!(WRITER);
89
90 debug::panic(
91 &mut [led],
92 writer,
93 info,
94 &cortexm4::support::nop,
95 &*addr_of!(PROCESSES),
96 &*addr_of!(CHIP),
97 &*addr_of!(PROCESS_PRINTER),
98 )
99}