stm32f446re/
lib.rs

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1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5#![no_std]
6
7pub use stm32f4xx::{
8    adc, chip, clocks, dbg, dma, exti, flash, gpio, nvic, rcc, spi, syscfg, tim2, usart,
9};
10
11pub mod chip_specs;
12pub mod interrupt_service;
13pub mod stm32f446re_nvic;
14
15use cortexm4f::{unhandled_interrupt, CortexM4F, CortexMVariant};
16
17// STM32F446xx has total of 97 interrupts
18// Extracted from `CMSIS/Device/ST/STM32F4xx/Include/stm32f446xx.h`
19// NOTE: There are missing IRQn between 0 and 96
20#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".irqs")]
21// `used` ensures that the symbol is kept until the final binary. However, as of
22// May 2020, due to the compilation process, there must be some other compiled
23// code here to make sure the object file is kept around. That means at minimum
24// there must be an `init()` function here so that compiler does not just ignore
25// the `IRQS` object. See https://github.com/rust-lang/rust/issues/56639 for a
26// related discussion.
27#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
28pub static IRQS: [unsafe extern "C" fn(); 97] = [
29    CortexM4F::GENERIC_ISR, // WWDG (0)
30    CortexM4F::GENERIC_ISR, // PVD (1)
31    CortexM4F::GENERIC_ISR, // TAMP_STAMP (2)
32    CortexM4F::GENERIC_ISR, // RTC_WKUP (3)
33    CortexM4F::GENERIC_ISR, // FLASH (4)
34    CortexM4F::GENERIC_ISR, // RCC (5)
35    CortexM4F::GENERIC_ISR, // EXTI0 (6)
36    CortexM4F::GENERIC_ISR, // EXTI1 (7)
37    CortexM4F::GENERIC_ISR, // EXTI2 (8)
38    CortexM4F::GENERIC_ISR, // EXTI3 (9)
39    CortexM4F::GENERIC_ISR, // EXTI4 (10)
40    CortexM4F::GENERIC_ISR, // DMA1_Stream0 (11)
41    CortexM4F::GENERIC_ISR, // DMA1_Stream1 (12)
42    CortexM4F::GENERIC_ISR, // DMA1_Stream2 (13)
43    CortexM4F::GENERIC_ISR, // DMA1_Stream3 (14)
44    CortexM4F::GENERIC_ISR, // DMA1_Stream4 (15)
45    CortexM4F::GENERIC_ISR, // DMA1_Stream5 (16)
46    CortexM4F::GENERIC_ISR, // DMA1_Stream6 (17)
47    CortexM4F::GENERIC_ISR, // ADC (18)
48    CortexM4F::GENERIC_ISR, // CAN1_TX (19)
49    CortexM4F::GENERIC_ISR, // CAN1_RX0 (20)
50    CortexM4F::GENERIC_ISR, // CAN1_RX1 (21)
51    CortexM4F::GENERIC_ISR, // CAN1_SCE (22)
52    CortexM4F::GENERIC_ISR, // EXTI9_5 (23)
53    CortexM4F::GENERIC_ISR, // TIM1_BRK_TIM9 (24)
54    CortexM4F::GENERIC_ISR, // TIM1_UP_TIM10 (25)
55    CortexM4F::GENERIC_ISR, // TIM1_TRG_COM_TIM11 (26)
56    CortexM4F::GENERIC_ISR, // TIM1_CC (27)
57    CortexM4F::GENERIC_ISR, // TIM2 (28)
58    CortexM4F::GENERIC_ISR, // TIM3 (29)
59    CortexM4F::GENERIC_ISR, // TIM4 (30)
60    CortexM4F::GENERIC_ISR, // I2C1_EV (31)
61    CortexM4F::GENERIC_ISR, // I2C1_ER (32)
62    CortexM4F::GENERIC_ISR, // I2C2_EV (33)
63    CortexM4F::GENERIC_ISR, // I2C2_ER (34)
64    CortexM4F::GENERIC_ISR, // SPI1 (35)
65    CortexM4F::GENERIC_ISR, // SPI2 (36)
66    CortexM4F::GENERIC_ISR, // USART1 (37)
67    CortexM4F::GENERIC_ISR, // USART2 (38)
68    CortexM4F::GENERIC_ISR, // USART3 (39)
69    CortexM4F::GENERIC_ISR, // EXTI15_10 (40)
70    CortexM4F::GENERIC_ISR, // RTC_Alarm (41)
71    CortexM4F::GENERIC_ISR, // OTG_FS_WKUP (42)
72    CortexM4F::GENERIC_ISR, // TIM8_BRK_TIM12 (43)
73    CortexM4F::GENERIC_ISR, // TIM8_UP_TIM13 (44)
74    CortexM4F::GENERIC_ISR, // TIM8_TRG_COM_TIM14 (45)
75    CortexM4F::GENERIC_ISR, // TIM8_CC (46)
76    CortexM4F::GENERIC_ISR, // DMA1_Stream7 (47)
77    CortexM4F::GENERIC_ISR, // FMC (48)
78    CortexM4F::GENERIC_ISR, // SDIO (49)
79    CortexM4F::GENERIC_ISR, // TIM5 (50)
80    CortexM4F::GENERIC_ISR, // SPI3 (51)
81    CortexM4F::GENERIC_ISR, // UART4 (52)
82    CortexM4F::GENERIC_ISR, // UART5 (53)
83    CortexM4F::GENERIC_ISR, // TIM6_DAC (54)
84    CortexM4F::GENERIC_ISR, // TIM7 (55)
85    CortexM4F::GENERIC_ISR, // DMA2_Stream0 (56)
86    CortexM4F::GENERIC_ISR, // DMA2_Stream1 (57)
87    CortexM4F::GENERIC_ISR, // DMA2_Stream2 (58)
88    CortexM4F::GENERIC_ISR, // DMA2_Stream3 (59)
89    CortexM4F::GENERIC_ISR, // DMA2_Stream4 (60)
90    unhandled_interrupt,    // (61)
91    unhandled_interrupt,    // (62)
92    CortexM4F::GENERIC_ISR, // CAN2_TX (63)
93    CortexM4F::GENERIC_ISR, // CAN2_RX0 (64)
94    CortexM4F::GENERIC_ISR, // CAN2_RX1 (65)
95    CortexM4F::GENERIC_ISR, // CAN2_SCE (66)
96    CortexM4F::GENERIC_ISR, // OTG_FS (67)
97    CortexM4F::GENERIC_ISR, // DMA2_Stream5 (68)
98    CortexM4F::GENERIC_ISR, // DMA2_Stream6 (69)
99    CortexM4F::GENERIC_ISR, // DMA2_Stream7 (70)
100    CortexM4F::GENERIC_ISR, // USART6 (71)
101    CortexM4F::GENERIC_ISR, // I2C3_EV (72)
102    CortexM4F::GENERIC_ISR, // I2C3_ER (73)
103    CortexM4F::GENERIC_ISR, // OTG_HS_EP1_OUT (74)
104    CortexM4F::GENERIC_ISR, // OTG_HS_EP1_IN (75)
105    CortexM4F::GENERIC_ISR, // OTG_HS_WKUP (76)
106    CortexM4F::GENERIC_ISR, // OTG_HS (77)
107    CortexM4F::GENERIC_ISR, // DCMI (78)
108    unhandled_interrupt,    // (79)
109    unhandled_interrupt,    // (80)
110    CortexM4F::GENERIC_ISR, // FPU (81)
111    unhandled_interrupt,    // (82)
112    unhandled_interrupt,    // (83)
113    CortexM4F::GENERIC_ISR, // SPI4 (84)
114    unhandled_interrupt,    // (85)
115    unhandled_interrupt,    // (86)
116    CortexM4F::GENERIC_ISR, // SAI1 (87)
117    unhandled_interrupt,    // (88)
118    unhandled_interrupt,    // (89)
119    unhandled_interrupt,    // (90)
120    CortexM4F::GENERIC_ISR, // SAI2 (91)
121    CortexM4F::GENERIC_ISR, // QUADSPI (92)
122    CortexM4F::GENERIC_ISR, // CEC (93)
123    CortexM4F::GENERIC_ISR, // SPDIF_RX (94)
124    CortexM4F::GENERIC_ISR, // FMPI2C1_EV (95)
125    CortexM4F::GENERIC_ISR, // FMPI2C1_ER (96)
126];
127
128pub unsafe fn init() {
129    stm32f4xx::init();
130}
stm32f446re/lib.rs

stm32f446re/
lib.rs
