stm32f429zi/
pwr.rs

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1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5use kernel::utilities::registers::interfaces::ReadWriteable;
6use kernel::utilities::registers::{register_bitfields, register_structs, ReadWrite};
7use kernel::utilities::StaticRef;
8use kernel::ErrorCode;
9
10register_structs! {
11    /// Power control
12    PwrRegisters {
13        /// power control register
14        (0x000 => cr: ReadWrite<u32, CR::Register>),
15        /// power control/status register
16        (0x004 => csr: ReadWrite<u32, CSR::Register>),
17        (0x008 => @END),
18    }
19}
20register_bitfields![u32,
21CR [
22    /// Low-power deep sleep
23    LPDS OFFSET(0) NUMBITS(1) [],
24    /// Power down deepsleep
25    PDDS OFFSET(1) NUMBITS(1) [],
26    /// Clear wakeup flag
27    CWUF OFFSET(2) NUMBITS(1) [],
28    /// Clear standby flag
29    CSBF OFFSET(3) NUMBITS(1) [],
30    /// Power voltage detector
31    /// enable
32    PVDE OFFSET(4) NUMBITS(1) [],
33    /// PVD level selection
34    PLS OFFSET(5) NUMBITS(3) [],
35    /// Disable backup domain write
36    /// protection
37    DBP OFFSET(8) NUMBITS(1) [],
38    /// Flash power down in Stop
39    /// mode
40    FPDS OFFSET(9) NUMBITS(1) [],
41    /// Low-Power Regulator Low Voltage in
42    /// deepsleep
43    LPLUDS OFFSET(10) NUMBITS(1) [],
44    /// Main regulator low voltage in deepsleep
45    /// mode
46    MRUDS OFFSET(11) NUMBITS(1) [],
47
48    ADCDC1 OFFSET(13) NUMBITS(1) [],
49    /// Regulator voltage scaling output
50    /// selection
51    VOS OFFSET(14) NUMBITS(2) [
52        Scale3 = 0b01,
53        Scale2 = 0b10,
54        Scale1 = 0b11,
55    ],
56    /// Over-drive enable
57    ODEN OFFSET(16) NUMBITS(1) [],
58    /// Over-drive switching
59    /// enabled
60    ODSWEN OFFSET(17) NUMBITS(1) [],
61    /// Under-drive enable in stop
62    /// mode
63    UDEN OFFSET(18) NUMBITS(2) []
64],
65CSR [
66    /// Wakeup flag
67    WUF OFFSET(0) NUMBITS(1) [],
68    /// Standby flag
69    SBF OFFSET(1) NUMBITS(1) [],
70    /// PVD output
71    PVDO OFFSET(2) NUMBITS(1) [],
72    /// Backup regulator ready
73    BRR OFFSET(3) NUMBITS(1) [],
74    /// Enable WKUP pin
75    EWUP OFFSET(8) NUMBITS(1) [],
76    /// Backup regulator enable
77    BRE OFFSET(9) NUMBITS(1) [],
78    /// Regulator voltage scaling output
79    /// selection ready bit
80    VOSRDY OFFSET(14) NUMBITS(1) [],
81    /// Over-drive mode ready
82    ODRDY OFFSET(16) NUMBITS(1) [],
83    /// Over-drive mode switching
84    /// ready
85    ODSWRDY OFFSET(17) NUMBITS(1) [],
86    /// Under-drive ready flag
87    UDRDY OFFSET(18) NUMBITS(2) []
88]
89];
90const PWR_BASE: StaticRef<PwrRegisters> =
91    unsafe { StaticRef::new(0x40007000 as *const PwrRegisters) };
92
93#[inline(never)]
94pub fn enable_backup_access() -> Result<(), ErrorCode> {
95    PWR_BASE.cr.modify(CR::DBP::SET);
96    Ok(())
97}
stm32f429zi/pwr.rs

stm32f429zi/
pwr.rs
