stm32f429zi/
lib.rs

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1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5#![no_std]
6
7use cortexm4f::{CortexM4F, CortexMVariant};
8
9pub use stm32f4xx::{
10    adc, can, chip, clocks, dac, dbg, dma, exti, flash, gpio, nvic, rcc, spi, syscfg, tim2, trng,
11    usart,
12};
13
14pub mod can_registers;
15pub mod chip_specs;
16pub mod interrupt_service;
17pub mod stm32f429zi_nvic;
18pub mod trng_registers;
19
20pub mod pwr;
21pub mod rtc;
22
23// STM32F42xxx and STM32F43xxx has total of 91 interrupts
24#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".irqs")]
25// `used` ensures that the symbol is kept until the final binary. However, as of
26// May 2020, due to the compilation process, there must be some other compiled
27// code here to make sure the object file is kept around. That means at minimum
28// there must be an `init()` function here so that compiler does not just ignore
29// the `IRQS` object. See https://github.com/rust-lang/rust/issues/56639 for a
30// related discussion.
31#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
32pub static IRQS: [unsafe extern "C" fn(); 91] = [
33    CortexM4F::GENERIC_ISR, // WWDG (0)
34    CortexM4F::GENERIC_ISR, // PVD (1)
35    CortexM4F::GENERIC_ISR, // TAMP_STAMP (2)
36    CortexM4F::GENERIC_ISR, // RTC_WKUP (3)
37    CortexM4F::GENERIC_ISR, // FLASH (4)
38    CortexM4F::GENERIC_ISR, // RCC (5)
39    CortexM4F::GENERIC_ISR, // EXTI0 (6)
40    CortexM4F::GENERIC_ISR, // EXTI1 (7)
41    CortexM4F::GENERIC_ISR, // EXTI2 (8)
42    CortexM4F::GENERIC_ISR, // EXTI3 (9)
43    CortexM4F::GENERIC_ISR, // EXTI4 (10)
44    CortexM4F::GENERIC_ISR, // DMA1_Stream0 (11)
45    CortexM4F::GENERIC_ISR, // DMA1_Stream1 (12)
46    CortexM4F::GENERIC_ISR, // DMA1_Stream2 (13)
47    CortexM4F::GENERIC_ISR, // DMA1_Stream3 (14)
48    CortexM4F::GENERIC_ISR, // DMA1_Stream4 (15)
49    CortexM4F::GENERIC_ISR, // DMA1_Stream5 (16)
50    CortexM4F::GENERIC_ISR, // DMA1_Stream6 (17)
51    CortexM4F::GENERIC_ISR, // ADC (18)
52    CortexM4F::GENERIC_ISR, // CAN1_TX (19)
53    CortexM4F::GENERIC_ISR, // CAN1_RX0 (20)
54    CortexM4F::GENERIC_ISR, // CAN1_RX1 (21)
55    CortexM4F::GENERIC_ISR, // CAN1_SCE (22)
56    CortexM4F::GENERIC_ISR, // EXTI9_5 (23)
57    CortexM4F::GENERIC_ISR, // TIM1_BRK_TIM9 (24)
58    CortexM4F::GENERIC_ISR, // TIM1_UP_TIM10 (25)
59    CortexM4F::GENERIC_ISR, // TIM1_TRG_COM_TIM11 (26)
60    CortexM4F::GENERIC_ISR, // TIM1_CC (27)
61    CortexM4F::GENERIC_ISR, // TIM2 (28)
62    CortexM4F::GENERIC_ISR, // TIM3 (29)
63    CortexM4F::GENERIC_ISR, // TIM4 (30)
64    CortexM4F::GENERIC_ISR, // I2C1_EV (31)
65    CortexM4F::GENERIC_ISR, // I2C1_ER (32)
66    CortexM4F::GENERIC_ISR, // I2C2_EV (33)
67    CortexM4F::GENERIC_ISR, // I2C2_ER (34)
68    CortexM4F::GENERIC_ISR, // SPI1 (35)
69    CortexM4F::GENERIC_ISR, // SPI2 (36)
70    CortexM4F::GENERIC_ISR, // USART1 (37)
71    CortexM4F::GENERIC_ISR, // USART2 (38)
72    CortexM4F::GENERIC_ISR, // USART3 (39)
73    CortexM4F::GENERIC_ISR, // EXTI15_10 (40)
74    CortexM4F::GENERIC_ISR, // RTC_Alarm (41)
75    CortexM4F::GENERIC_ISR, // OTG_FS_WKUP (42)
76    CortexM4F::GENERIC_ISR, // TIM8_BRK_TIM12 (43)
77    CortexM4F::GENERIC_ISR, // TIM8_UP_TIM13 (44)
78    CortexM4F::GENERIC_ISR, // TIM8_TRG_COM_TIM14 (45)
79    CortexM4F::GENERIC_ISR, // TIM8_CC (46)
80    CortexM4F::GENERIC_ISR, // DMA1_Stream7 (47)
81    CortexM4F::GENERIC_ISR, // FMC (48)
82    CortexM4F::GENERIC_ISR, // SDIO (49)
83    CortexM4F::GENERIC_ISR, // TIM5 (50)
84    CortexM4F::GENERIC_ISR, // SPI3 (51)
85    CortexM4F::GENERIC_ISR, // UART4 (52)
86    CortexM4F::GENERIC_ISR, // UART5 (53)
87    CortexM4F::GENERIC_ISR, // TIM6_DAC (54)
88    CortexM4F::GENERIC_ISR, // TIM7 (55)
89    CortexM4F::GENERIC_ISR, // DMA2_Stream0 (56)
90    CortexM4F::GENERIC_ISR, // DMA2_Stream1 (57)
91    CortexM4F::GENERIC_ISR, // DMA2_Stream2 (58)
92    CortexM4F::GENERIC_ISR, // DMA2_Stream3 (59)
93    CortexM4F::GENERIC_ISR, // DMA2_Stream4 (60)
94    CortexM4F::GENERIC_ISR, // ETH (61)
95    CortexM4F::GENERIC_ISR, // ETH_WKUP (62)
96    CortexM4F::GENERIC_ISR, // CAN2_TX (63)
97    CortexM4F::GENERIC_ISR, // CAN2_RX0 (64)
98    CortexM4F::GENERIC_ISR, // CAN2_RX1 (65)
99    CortexM4F::GENERIC_ISR, // CAN2_SCE (66)
100    CortexM4F::GENERIC_ISR, // OTG_FS (67)
101    CortexM4F::GENERIC_ISR, // DMA2_Stream5 (68)
102    CortexM4F::GENERIC_ISR, // DMA2_Stream6 (69)
103    CortexM4F::GENERIC_ISR, // DMA2_Stream7 (70)
104    CortexM4F::GENERIC_ISR, // USART6 (71)
105    CortexM4F::GENERIC_ISR, // I2C3_EV (72)
106    CortexM4F::GENERIC_ISR, // I2C3_ER (73)
107    CortexM4F::GENERIC_ISR, // OTG_HS_EP1_OUT (74)
108    CortexM4F::GENERIC_ISR, // OTG_HS_EP1_IN (75)
109    CortexM4F::GENERIC_ISR, // OTG_HS_WKUP (76)
110    CortexM4F::GENERIC_ISR, // OTG_HS (77)
111    CortexM4F::GENERIC_ISR, // DCMI (78)
112    CortexM4F::GENERIC_ISR, // CRYP (79)
113    CortexM4F::GENERIC_ISR, // HASH_RNG (80)
114    CortexM4F::GENERIC_ISR, // FPU (81)
115    CortexM4F::GENERIC_ISR, // USART7 (82)
116    CortexM4F::GENERIC_ISR, // USART8 (83)
117    CortexM4F::GENERIC_ISR, // SPI4 (84)
118    CortexM4F::GENERIC_ISR, // SPI5 (85)
119    CortexM4F::GENERIC_ISR, // SPI6 (86)
120    CortexM4F::GENERIC_ISR, // SAI1 (87)
121    CortexM4F::GENERIC_ISR, // LCD-TFT (88)
122    CortexM4F::GENERIC_ISR, // LCD-TFT (89)
123    CortexM4F::GENERIC_ISR, // DMA2D(90)
124];
125
126pub unsafe fn init() {
127    stm32f4xx::init();
128}
stm32f429zi/lib.rs

stm32f429zi/
lib.rs
