riscv/csr/
minstret.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5use kernel::utilities::registers::register_bitfields;
6
7// minstret is the lower XLEN bits of the number of elapsed instructions
8register_bitfields![usize,
9    pub minstret [
10        minstret OFFSET(0) NUMBITS(crate::XLEN) []
11    ]
12];
13
14// `minstreth` is the higher XLEN bits of the number of elapsed instructions.
15// It does not exist on riscv64.
16#[cfg(not(target_arch = "riscv64"))]
17register_bitfields![usize,
18    pub minstreth [
19        minstreth OFFSET(0) NUMBITS(crate::XLEN) []
20    ]
21];