pub struct SpiHw<'a> { /* private fields */ }
Expand description
Abstraction of the SPI Hardware
Implementations§
Source§impl<'a> SpiHw<'a>
impl<'a> SpiHw<'a>
Sourcepub const fn new(pm: &'a PowerManager) -> SpiHw<'a>
pub const fn new(pm: &'a PowerManager) -> SpiHw<'a>
Creates a new SPI object, with peripheral 0 selected
Sourcepub fn set_baud_rate(&self, rate: u32) -> u32
pub fn set_baud_rate(&self, rate: u32) -> u32
Sets the approximate baud rate for the active peripheral, and return the actual baud rate set.
Since the only supported baud rates are (system clock / n) where n is an integer from 1 to 255, the exact baud rate may not be available. In that case, the next lower baud rate will be selected.
The lowest available baud rate is 188235 baud. If the requested rate is lower, 188235 baud will be selected.
Sourcepub fn set_dma(&self, read: &'static DMAChannel, write: &'static DMAChannel)
pub fn set_dma(&self, read: &'static DMAChannel, write: &'static DMAChannel)
Set the DMA channels used for reading and writing.
pub fn handle_interrupt(&self)
Trait Implementations§
Source§impl DMAClient for SpiHw<'_>
impl DMAClient for SpiHw<'_>
fn transfer_done(&self, _pid: DMAPeripheral)
Source§impl PeripheralManagement<Clock> for SpiHw<'_>
impl PeripheralManagement<Clock> for SpiHw<'_>
type RegisterType = SpiRegisters
Source§fn get_registers(&self) -> &SpiRegisters
fn get_registers(&self) -> &SpiRegisters
Source§fn before_peripheral_access(&self, clock: &Clock, _: &SpiRegisters)
fn before_peripheral_access(&self, clock: &Clock, _: &SpiRegisters)
Source§fn after_peripheral_access(&self, clock: &Clock, registers: &SpiRegisters)
fn after_peripheral_access(&self, clock: &Clock, registers: &SpiRegisters)
Source§impl<'a> SpiMaster<'a> for SpiHw<'a>
impl<'a> SpiMaster<'a> for SpiHw<'a>
Source§fn init(&self) -> Result<(), ErrorCode>
fn init(&self) -> Result<(), ErrorCode>
By default, initialize SPI to operate at 40KHz, clock is idle on low, and sample on the leading edge.
Source§fn write_byte(&self, out_byte: u8) -> Result<(), ErrorCode>
fn write_byte(&self, out_byte: u8) -> Result<(), ErrorCode>
Write a byte to the SPI and discard the read; if an asynchronous operation is outstanding, do nothing.
Source§fn read_byte(&self) -> Result<u8, ErrorCode>
fn read_byte(&self) -> Result<u8, ErrorCode>
Write 0 to the SPI and return the read; if an asynchronous operation is outstanding, do nothing.
Source§fn read_write_byte(&self, val: u8) -> Result<u8, ErrorCode>
fn read_write_byte(&self, val: u8) -> Result<u8, ErrorCode>
Write a byte to the SPI and return the read; if an asynchronous operation is outstanding, do nothing.
Source§fn read_write_bytes(
&self,
write_buffer: SubSliceMut<'static, u8>,
read_buffer: Option<SubSliceMut<'static, u8>>,
) -> Result<(), (ErrorCode, SubSliceMut<'static, u8>, Option<SubSliceMut<'static, u8>>)>
fn read_write_bytes( &self, write_buffer: SubSliceMut<'static, u8>, read_buffer: Option<SubSliceMut<'static, u8>>, ) -> Result<(), (ErrorCode, SubSliceMut<'static, u8>, Option<SubSliceMut<'static, u8>>)>
Asynchronous buffer read/write of SPI. write_buffer
must be present;
read_buffer
may be None
. If read_buffer is present, then the length
of the read/write is the minimum of two buffer lengths.
Returns:
Ok(())
if operation starts (will receive callback through SpiMasterClient)BUSY
if the operation does not start
Source§type ChipSelect = Peripheral
type ChipSelect = Peripheral
Source§fn set_client(&self, client: &'a dyn SpiMasterClient)
fn set_client(&self, client: &'a dyn SpiMasterClient)
SpiMaster::read_write_bytes
calls.Source§fn is_busy(&self) -> bool
fn is_busy(&self) -> bool
SpiMaster::read_write_bytes
operation.Source§fn set_rate(&self, rate: u32) -> Result<u32, ErrorCode>
fn set_rate(&self, rate: u32) -> Result<u32, ErrorCode>
Source§fn set_polarity(&self, polarity: ClockPolarity) -> Result<(), ErrorCode>
fn set_polarity(&self, polarity: ClockPolarity) -> Result<(), ErrorCode>
Source§fn get_polarity(&self) -> ClockPolarity
fn get_polarity(&self) -> ClockPolarity
Source§fn set_phase(&self, phase: ClockPhase) -> Result<(), ErrorCode>
fn set_phase(&self, phase: ClockPhase) -> Result<(), ErrorCode>
Source§fn get_phase(&self) -> ClockPhase
fn get_phase(&self) -> ClockPhase
Source§fn hold_low(&self)
fn hold_low(&self)
SpiMaster::read_write_bytes
completes. This allows a client to make one long SPI read/write with
multiple calls to read_write_bytes
.Source§fn release_low(&self)
fn release_low(&self)
SpiMaster::read_write_bytes
completes. This will complete the SPI operation.Source§fn specify_chip_select(&self, cs: Self::ChipSelect) -> Result<(), ErrorCode>
fn specify_chip_select(&self, cs: Self::ChipSelect) -> Result<(), ErrorCode>
Source§impl<'a> SpiSlave<'a> for SpiHw<'a>
impl<'a> SpiSlave<'a> for SpiHw<'a>
Source§fn set_write_byte(&self, write_byte: u8)
fn set_write_byte(&self, write_byte: u8)
This sets the value in the TDR register, to be sent as soon as the chip select pin is low.
Source§fn read_write_bytes(
&self,
write_buffer: Option<&'static mut [u8]>,
read_buffer: Option<&'static mut [u8]>,
len: usize,
) -> Result<(), (ErrorCode, Option<&'static mut [u8]>, Option<&'static mut [u8]>)>
fn read_write_bytes( &self, write_buffer: Option<&'static mut [u8]>, read_buffer: Option<&'static mut [u8]>, len: usize, ) -> Result<(), (ErrorCode, Option<&'static mut [u8]>, Option<&'static mut [u8]>)>
Setup buffers for a SPI transaction initiated by the master device.
Returns:
Ok(())
if the operation starts. A callback will be generated.INVAL
if neither the read or write buffer is provided.
Source§fn set_client(&self, client: Option<&'a dyn SpiSlaveClient>)
fn set_client(&self, client: Option<&'a dyn SpiSlaveClient>)
None
to disable
peripheral mode.