Enum ClockPhase

pub enum ClockPhase {
    SampleLeading,
    SampleTrailing,
}

Clock phase (CPHA) defines whether to sample and send data on a leading or trailing clock edge.

Consult a SPI reference on how CPHA interacts with CPOL.

Variants

SampleLeading

Sample on the leading clock edge. This is CPHA = 0. If CPOL is 0, then this samples on the rising edge of the clock. If CPOL is 1, then this samples on the falling edge of the clock.

SampleTrailing

Sample on the trailing clock edge. This is CPHA = 1. If CPOL is 0, then this samples on the falling edge of the clock. If CPOL is 1, then this samples on the rising edge of the clock.

Trait Implementations

impl Clone for ClockPhase

fn clone(&self) -> ClockPhase

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for ClockPhase

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for ClockPhase

fn eq(&self, other: &ClockPhase) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for ClockPhase

impl StructuralPartialEq for ClockPhase