Crate litex_arty
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Board file for a LiteX-built VexRiscv-based SoC synthesized for a Digilent Arty-A7 FPGA board
Modules
- io 🔒
Structs
- A structure representing this platform that holds references to all capsules for this platform.
- Structure for dynamic interrupt mapping, depending on the SoC configuration
Constants
Statics
- Dummy buffer that causes the linker to reserve enough space for the stack.
Functions
- main⚠Main function.