Crate litex_arty

Board file for a LiteX-built VexRiscv-based SoC synthesized for a Digilent Arty-A7 FPGA board

Modules

• io 🔒
• litex_generated_constants 🔒

Structs

• LiteXArty 🔒
  A structure representing this platform that holds references to all capsules for this platform.
• LiteXArtyInterruptablePeripherals 🔒
  Structure for dynamic interrupt mapping, depending on the SoC configuration
• LiteXArtyPanicReferences 🔒

Constants

• FAULT_RESPONSE 🔒
• NUM_PROCS 🔒

Statics

• PANIC_REFERENCES 🔒
• PROCESSES 🔒
• STACK_MEMORY
  Dummy buffer that causes the linker to reserve enough space for the stack.

Functions

• main^⚠
  Main function.