Module spi

Interfaces for SPI controller (master) and peripheral (slave) communication.

We use the terms master/slave in some situations because the term peripheral can also refer to a hardware peripheral (e.g., memory-mapped I/O devices in ARM are called peripherals).

Modules

• cs
  Utility types for modeling chip select pins in a SpiMaster implementation.

Enums

• ClockPhase
  Clock phase (CPHA) defines whether to sample and send data on a leading or trailing clock edge.
• ClockPolarity
  Clock polarity (CPOL) defines whether the SPI clock is high or low when idle.
• DataOrder
  Data order defines the order of bits sent over the wire: most significant first, or least significant first.

Traits

• SpiMaster
  Trait for interacting with SPI peripheral devices at a byte or buffer level.
• SpiMasterClient
  Trait for clients of a SPI bus in master mode.
• SpiMasterDevice
  A chip-select-specific interface to the SPI Controller hardware, such that a client cannot change the chip select line.
• SpiSlave
  Trait for SPI peripherals (slaves) to exchange data with a contoller (master).
• SpiSlaveClient
  Trait for SPI peripherals (slaves) to receive callbacks when the corresponding controller (master) issues operations.
• SpiSlaveDevice
  An interface to a SPI bus in peripheral mode.