Crate cortexm0p

Source
Expand description

Shared implementations for ARM Cortex-M0+ MCUs.

Modules§

mpu
nvic
Cortex-M Nested Vectored Interrupt Controller (NVIC)
scb
Cortex-M System Control Block (SCB)
support
Helper functions for the Cortex-M architecture.
syscall
systick
Cortex-M SysTick Timer

Macros§

interrupt_mask
Generates the (u128, u128) tuple used for the NVIC’s mask functions next_pending_with_mask and next_pending_with_mask.

Enums§

CortexM0P

Traits§

CortexMVariant
Trait to encapsulate differences in between Cortex-M variants

Functions§

initialize_ram_jump_to_main
svc_handler_m0p
unhandled_interrupt