Crate rv32i

Support for the 32-bit RISC-V architecture.

Modules

clic

Core Local Interrupt Control peripheral driver.

csr

Tock Register interface for using CSR registers.

machine_timer

RISC-V Generic Machine Timer

pmp

support

Core low-level operations.

syscall

Kernel-userland system call interface for RISC-V architecture.

Enums

PermissionMode

The various privilege levels in RISC-V.

Functions

_start^⚠

This assembly does three functions:

_start_trap^⚠

This is the trap handler function. This code is called on all traps, including interrupts, exceptions, and system calls from applications.

configure_trap_handler^⚠

Tell the MCU what address the trap handler is located at, and initialize mscratch to zero, indicating kernel execution.

print_mcause^⚠

Print a readable string for an mcause reason.

print_riscv_state^⚠

Prints out RISCV machine state, including basic system registers (mcause, mstatus, mtvec, mepc, mtval, interrupt status).

semihost_command^⚠

RISC-V semihosting needs three exact instructions in uncompressed form.