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IO Slave Driver (I2C and SPI)
This file provides support for the Apollo3 IOS. The IOS is a little strange in that I2C operations go straight to a local RAM area.
The first byte of data (after the I2C address and operation byte) will be interpreteted as an address offset by the hardware.
If the offset was between 0x00 and 0x77 the data will be in the RAM which we can access from 0x5000_0000 to 0x5000_0077. This will generate the XCMPWR interrupt on writes from the master.
If the offset was the following it is written to the interrupt or FIFO registers. This will generate a XCMPWF on writes from the master: - 0x78-7B -> IOINT Regs - 0x7C -> FIFOCTRLO - 0x7D -> FIFOCTRUP - 0x7F -> FIFO (DATA)
Unfortunately we have no way to know where the data was written.
We currently don’t support the FIFO registers. As there is no way to know where the data was written we assume it was written to offset 0x0F. This is the first non interrupt flag generating address. This also matches the first byte of a MCTP packet.
So, if you would like to write data to this device, the first byte of data must be 0x0F.