Trait kernel::hil::gpio_async::Port

source ·

pub trait Port {
    // Required methods
    fn disable(&self, pin: usize) -> Result<(), ErrorCode>;
    fn make_output(&self, pin: usize) -> Result<(), ErrorCode>;
    fn make_input(
        &self,
        pin: usize,
        mode: FloatingState
    ) -> Result<(), ErrorCode>;
    fn read(&self, pin: usize) -> Result<(), ErrorCode>;
    fn toggle(&self, pin: usize) -> Result<(), ErrorCode>;
    fn set(&self, pin: usize) -> Result<(), ErrorCode>;
    fn clear(&self, pin: usize) -> Result<(), ErrorCode>;
    fn enable_interrupt(
        &self,
        pin: usize,
        mode: InterruptEdge
    ) -> Result<(), ErrorCode>;
    fn disable_interrupt(&self, pin: usize) -> Result<(), ErrorCode>;
    fn is_pending(&self, pin: usize) -> bool;
}

Expand description

Interface for banks of asynchronous GPIO pins. GPIO pins are asynchronous when there is an asynchronous interface used to control them. The most common example is when using a GPIO extender on an I2C or SPI bus. With asynchronous GPIO functions, every config action results in an eventual callback function that indicates that the configuration has finished (unless the initial function call returns an error code, then no callback will be generated).

Asynchronous GPIO pins are grouped into ports because it is assumed that the remote entity that is controlling the pins can control multiple pins. Typically, a port will be provided by a particular driver.

The API for the Port mirrors the synchronous GPIO interface.